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HY5V72DLMP-H PDF预览

HY5V72DLMP-H

更新时间: 2024-11-07 19:36:07
品牌 Logo 应用领域
海力士 - HYNIX 动态存储器内存集成电路
页数 文件大小 规格书
13页 284K
描述
Synchronous DRAM, 16MX32, 5.4ns, CMOS, PBGA90, 0.80 MM PITCH, LEAD FREE, FBGA-90

HY5V72DLMP-H 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:BGA包装说明:LFBGA,
针数:90Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.28
风险等级:5.84访问模式:FOUR BANK PAGE BURST
最长访问时间:5.4 ns其他特性:AUTO/SELF REFRESH
JESD-30 代码:R-PBGA-B90JESD-609代码:e1
长度:13 mm内存密度:536870912 bit
内存集成电路类型:SYNCHRONOUS DRAM内存宽度:32
功能数量:1端口数量:1
端子数量:90字数:16777216 words
字数代码:16000000工作模式:SYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:16MX32封装主体材料:PLASTIC/EPOXY
封装代码:LFBGA封装形状:RECTANGULAR
封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.4 mm
自我刷新:YES最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Silver/Copper (Sn/Ag/Cu)
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:20
宽度:11 mmBase Number Matches:1

HY5V72DLMP-H 数据手册

 浏览型号HY5V72DLMP-H的Datasheet PDF文件第2页浏览型号HY5V72DLMP-H的Datasheet PDF文件第3页浏览型号HY5V72DLMP-H的Datasheet PDF文件第4页浏览型号HY5V72DLMP-H的Datasheet PDF文件第5页浏览型号HY5V72DLMP-H的Datasheet PDF文件第6页浏览型号HY5V72DLMP-H的Datasheet PDF文件第7页 
Preliminary  
HY5V72D(L/S)M(P) Series  
4Banks x4M x 32bits Synchronous DRAM  
Document Title  
4Bank x 4M x 32bits Synchronous DRAM  
Revision History  
Revision No.  
History  
Draft Date  
Remark  
0.1  
Initial Draft  
Nov. 2003  
Preliminary  
Renew the Part Number  
HY5V72D(L/S)F(P) series  
0.2  
May 2004  
Preliminary  
--> HY5V72D(L/S)M(P) series  
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for  
use of circuits described. No patent licenses are implied.  
Rev. 0.2 / May. 2004  
1

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