Datasheet > HY5W2A2(L/S)F

HY5W2A2(L/S)F

更新时间： 2024-02-09 21:29:12

品牌	Logo	应用领域
其他 - ETC		动态存储器
页数	文件大小	规格书
25页	372K
描述
4Mx32\|2.5V\|4K\|H\|Handy SDRAM - 128M

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技术参数
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HY5W2A2(L/S)F 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	BGA
包装说明：	TFBGA, BGA90,9X15,32	针数：	90
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.32.00.02	风险等级：	5.84
访问模式：	FOUR BANK PAGE BURST	最长访问时间：	7 ns
其他特性：	AUTO/SELF REFRESH	最大时钟频率 (fCLK)：	100 MHz
I/O 类型：	COMMON	交错的突发长度：	1,2,4,8
JESD-30 代码：	R-PBGA-B90	JESD-609代码：	e1
长度：	13 mm	内存密度：	134217728 bit
内存集成电路类型：	SYNCHRONOUS DRAM	内存宽度：	32
功能数量：	1	端口数量：	1
端子数量：	90	字数：	4194304 words
字数代码：	4000000	工作模式：	SYNCHRONOUS
最高工作温度：	80 °C	最低工作温度：	-10 °C
组织：	4MX32	输出特性：	3-STATE
封装主体材料：	PLASTIC/EPOXY	封装代码：	TFBGA
封装等效代码：	BGA90,9X15,32	封装形状：	RECTANGULAR
封装形式：	GRID ARRAY, THIN PROFILE, FINE PITCH	峰值回流温度（摄氏度）：	260
电源：	1.8/2.5,2.5 V	认证状态：	Not Qualified
刷新周期：	4096	座面最大高度：	1.2 mm
自我刷新：	YES	连续突发长度：	1,2,4,8,FP
最大待机电流：	0.0006 A	子类别：	DRAMs
最大压摆率：	0.13 mA	最大供电电压 (Vsup)：	2.7 V
最小供电电压 (Vsup)：	2.3 V	标称供电电压 (Vsup)：	2.5 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL EXTENDED	端子面层：	Tin/Silver/Copper (Sn/Ag/Cu)
端子形式：	BALL	端子节距：	0.8 mm
端子位置：	BOTTOM	处于峰值回流温度下的最长时间：	20
宽度：	8 mm	Base Number Matches：	1

HY5W2A2(L/S)F 数据手册

HY5W2A2(L/S)F / HY57W2A3220(L/S)T

HY5W22F / HY57W283220T

4Banks x 1M x 32bits Synchronous DRAM

DESCRIPTION

The Hynix Low Power SDRAM is suited for non-PC application which use the batteries such as PDAs, 2.5G and 3G

cellular phones with internet access and multimedia capabilities, mini-notebook, handheld PCs

The Hynix HY5W2A2F series is a 134,217,728-bit CMOS Synchronous DRAM, ideally suited for the memory applica-

tions which require wide data I/O and high bandwidth. HY5W2A2F series is organized as 4banks of 1,048,576x32.

The Low Power SDRAM provides for programmable options including CAS latency of 1, 2, or 3, READ or WRITE burst

length of 1, 2, 4, 8, or full page, and the burst count sequence(sequential or interleave). And the Low Power SDRAM

also provides for special programmable options including Partial Array Self Refresh of 1bank, 2banks, or all banks,

Temperature Compensated Self Refresh of 15, 45, 70, or 85 degrees C. A burst of Read or Write cycles in progress

can be terminated by a burst terminate command or can be interrupted and replaced by a new burst Read or Write

command on any cycle(This pipelined design is not restricted by a 2N rule).

Deep Power Down Mode is a additional operating mode for Low Power SDRAM. This mode can achieve maximum

power reduction by removing power to the memory array within each SDRAM. By using this feature, the system can

cut off alomost all DRAM power without adding the cost of a power switch and giving up mother-board power-line lay-

out flexibility.

FEATURES

•

Standard SDRAM Protocol

Internal 4bank operation

Voltage : VDD = 2.5V, VDDQ = 1.8V & 2.5V

LVTTL compatible I/O Interface

Low Voltage interface to reduce I/O power

Low Power Features ( HY5W22F / HY57W283220T series can’t support these features)

- PASR(Partial Array Self Refresh)

- TCSR(Temperature Compensated Self Refresh)

- Deep Power Down Mode

•

Packages : 90ball, 0.8mm pitch FBGA / 86pin, TSOP

-25 ~ 85C Operation

ORDERING INFORMATION

Clock Frequency

Part No.

Organization

Interface

Package

CAS Latench

HY57W2A3220(L/S)T-H

HY5W2A2(L/S)F-H

133MHz

CL 3

4Banks x 1Mbits

x32

LVTTL

HY57W2A3220(L/S)T-8

HY5W2A2(L/S)F-8

125MHz

CL 3

4Banks x 1Mbits

x32

90balls FBGA

(HY5xxxxxxF)

86pin TSOP-II

(HY5xxxxxxT)

HY57W2A3220(L/S)T-P

HY5W2A2(L/S)F-P

100MHz

CL 2

4Banks x 1Mbits

x32

HY57W2A3220(L/S)T-S

HY5W2A2(L/S)F-S

100MHz

CL 3

4Banks x 1Mbits

x32

HY57W2A3220(L/S)T-B

HY5W2A2(L/S)F-B

66MHz

CL 2

4Banks x 1Mbits

x32

This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not assume

any responsibility for use of circuits described. No patent licenses are implied.

Rev. 0.4/Oct. 02

12 3 4 5 6 7...25

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与HY5W2A2(L/S)F相关器件

型号	品牌	描述	获取价格	数据表
HY5W2A2(L/S)FC	ETC	4Mx32\|2.5V\|4K\|H\|Handy SDRAM - 128M	获取价格
HY5W2A2F-HC	HYNIX	Synchronous DRAM, 4MX32, 5.4ns, CMOS, PBGA90, 0.80 MM PITCH, FBGA-90	获取价格
HY5W2A2F-P	HYNIX	Synchronous DRAM, 4MX32, 7ns, CMOS, PBGA90, 0.80 MM PITCH, FBGA-90	获取价格
HY5W2A2F-PC	HYNIX	Synchronous DRAM, 4MX32, 7ns, CMOS, PBGA90, 0.80 MM PITCH, FBGA-90	获取价格
HY5W2A2LF-8	HYNIX	Synchronous DRAM, 4MX32, 6ns, CMOS, PBGA90, 0.80 MM PITCH, FBGA-90	获取价格
HY5W2A2LF-HC	HYNIX	Synchronous DRAM, 4MX32, 5.4ns, CMOS, PBGA90, 0.80 MM PITCH, FBGA-90	获取价格

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