®
HSP45240
Address Sequencer
July 2004
Features
Des cription
• Block Oriented 24-Bit Sequencer
• Configurable as Two Independent 12-Bit Sequencers
• 24 x 24 Crosspoint Switch
The Intersil HSP45240 is a high speed Address Sequencer
which provides specialized addressing for functions like
FFTs, 1-D and 2-D filtering, matrix operations, and image
manipulation. The sequencer supports block oriented
addressing of large data sets up to 24-bits at clock speeds
up to 50MHz.
• Programmable Delay on 12 Outputs
• Multi-Chip Synchronization Signals
• Standard µP Interface
Specialized addressing requirements are met by using the
onboard 24 x 24 crosspoint switch. This feature allows the map-
ping of the 24 address bits at the output of the address genera-
tor to the 24 address outputs of the chip. As a result, bit reverse
addressing, such as that used in FFTs, is made possible.
• 100pF Drive on Outputs
• DC to 50MHz Clock Rate
A single chip solution to read/write addressing is also made
possible by configuring the HSP45240 as two 12-bit
sequencers. To compensate for system pipeline delay, a
programmable delay is provided on 12 of the address out-
puts.
Applications
• 1-D, 2-D Filtering
• Pan/Zoom Addressing
• FFT Processing
The HSP45240 is manufactured using an advanced CMOS
process, and is a low power fully static design. The configu-
ration of the device is controlled through a standard micro-
processor interface and all inputs/outputs, with the exception
of clock, are TTL compatible.
• Matrix Math Operations
Ordering Information
TEMP.
PKG.
DWG. #
PART NUMBER
HSP45240JC-33
HSP45240JC-50
RANGE (°C)
PACKAGE
68 Ld PLCC
68 Ld PLCC
0 to 70
0 to 70
N68.95
N68.95
Block Diagram
STARTOUT
ADDVAL
DONE
BLOCKDONE
12
OUT12-23
REG
STARTIN
24
CROSSPOINT
SWITCH
START
CIRCUITRY
SEQUENCE
GENERATOR
OEH
12
DELAY
1-8
OUT0-11
DLYBLK
OEL
BUSY
PROCESSOR INTERFACE
D0-6, CS, A0, WR
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Copyright Harris Corporation 1997, Copyright Intersil Americas Inc. 2004. All Rights Reserved
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