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HSP48410

更新时间: 2024-01-28 21:30:05
品牌 Logo 应用领域
英特矽尔 - INTERSIL /
页数 文件大小 规格书
12页 88K
描述
Histogrammer/Accumulating Buffer

HSP48410 数据手册

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HSP48410  
Data Sheet  
May 1999  
File Number 3185.2  
Histogrammer/Accumulating Buffer  
Features  
The Intersil HSP48410 is an 84 lead Histogrammer IC  
intended for use in image and signal analysis. The on-board  
memory is configured as 1024 x 24 array. This translates to  
a pixel resolution of 10 bits and an image size of 4k x 4k with  
no possibility of overflow.  
• 10-Bit Pixel Data  
• 4k x 4k Frame Sizes  
• Asynchronous Flash Clear Pin  
• Single Cycle Memory Clear  
In addition to Histogramming, the HSP48410 can generate  
and store the Cumulative Distribution Function for use in  
Histogram Equalization applications. Other capabilities of  
the HSP48410 include: Bin Accumulation, Look Up Table,  
24-bit Delay Memory, and Delay and Subtract mode.  
• Fully Asynchronous 16 or 24-Bit Host Interface  
• Generates and Stores Cumulative Distribution Function  
• Look Up Table Mode  
• 1024 x 24-Bit Delay Memory  
A Flash Clear pin is available in all modes of operation and  
performs a single cycle reset on all locations of the internal  
memory array and all internal data paths.  
• 24-Bit Three State I/O Bus  
• DC to 40MHz Clock Rate  
The HSP48410 includes a fully asynchronous interface  
which provides a means for communications with a host,  
such as a microprocessor. The interface includes dedicated  
Read/Write pins and an address port which are  
asynchronous to the system clock. This allows random  
access of the Histogram Memory Array for analysis or  
conditioning of the stored data.  
Applications  
• Histogramming  
• Histogram Equalization  
• Image and Signal Analysis  
• Image Enhancement  
• RGB Video Delay Line  
Ordering Information  
TEMP.  
PKG.  
NO.  
o
PART NUMBER RANGE ( C)  
PACKAGE  
84 Ld PLCC  
HSP48410JC-33  
HSP48410JC-40  
HSP48410GC-33  
HSP48410GC-40  
0 to 70  
0 to 70  
0 to 70  
0 to 70  
N84.1.15  
N84.1.15  
G84.A  
84 Ld PLCC  
84 Ld PGA  
84 Ld PGA  
G84.A  
Block Diagram  
24  
24  
HISTOGRAM  
MEMORY  
ARRAY  
DATA  
OUT  
DIO0-23  
24  
DIO  
DATA  
IN  
ADDER  
MUX  
INTERACE  
24  
DIN0-23  
10  
10  
ADDRESS  
PIN0-9  
ADDRESS  
10  
GENERATOR  
IOADD0-9  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999  
1

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