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HSP48908

更新时间: 2024-09-27 22:36:31
品牌 Logo 应用领域
英特矽尔 - INTERSIL /
页数 文件大小 规格书
18页 113K
描述
Two Dimensional Convolver

HSP48908 数据手册

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HSP48908  
Data Sheet  
May 1999  
File Number 2456.5  
Two Dimensional Convolver  
Features  
The Intersil HSP48908 is a high speed Two Dimensional  
Convolver which provides a single chip implementation of a  
video data rate 3 x 3 kernel convolution on two dimensional  
data. It eliminates the need for external data storage through  
the use of the on-chip row buffers which are programmable  
for row lengths up to 1024 pixels.  
• Single Chip 3 x 3 Kernel Convolution  
• Programmable On-Chip Row Buffers  
• DC to 32MHz Clock Rate  
• Cascadable for Larger Kernels and Images  
• On-Chip 8-Bit ALU  
There are Internal Register banks for storing two  
independent 3 x 3 filter kernels, thus facilitating the  
implementation of adaptive filters and multiple filter  
operations on the same data. The pixel data path also  
includes an on-chip ALU for performing real-time arithmetic  
and logical pixel point operations.  
• Dual Coefficient Mask Registers, Switchable in a  
Single Clock Cycle  
• 8-Bit Signed or Unsigned Input and Coefficient Data  
• 20-Bit Extended Precision Output  
• Standard µP Interface  
Data is provided to the HSP48908 in a raster scan  
noninterlaced fashion, and is internally buffered on images  
up to 1024 pixels wide for the 3 x 3 convolution operation.  
Images with larger rows and convolution with larger kernel  
sizes can be accommodated by using external row buffers  
and/or multiple HSP48908s. Coefficient and pixel input data  
are 8-bit signed or unsigned integers, and the 20-bit  
convolver output guarantees no overflow for kernel sizes up  
to 4 x 4. Larger kernel sizes can be implemented however,  
since the filter coefficients will normally be less than their  
maximum 8-bit values.  
• Low Power CMOS  
Applications  
• Image Filtering  
• Edge Detection  
• Adaptive Filtering  
• Real Time Video Filter  
Ordering Information  
The HSP48908 is manufactured using an advanced CMOS  
process, and is a low power fully static design. The  
configuration of the device is controlled through a standard  
microprocessor interface and all inputs/outputs are TTL  
compatible.  
TEMP.  
o
PART NUMBER RANGE ( C)  
PACKAGE  
PKG. NO.  
HSP48908VC-20  
HSP48908VC-32  
HSP48908JC-20  
HSP48908JC-32  
HSP48908GC-20  
HSP48908GC-32  
0 to 70  
0 to 70  
0 to 70  
0 to 70  
0 to 70  
0 to 0  
100 Ld MQFP Q100x14x20  
100 Ld MQFP Q100x14x20  
84 Ld PLCC  
84 Ld PLCC  
84 Ld PGA  
84 Ld PGA  
N84.1.15  
N84.1.15  
G84.A  
G84.A  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999  
1

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