Datasheet > HSP50110JC-52

HSP50110JC-52

更新时间： 2024-01-28 02:41:48

品牌	Logo	应用领域
英特矽尔 - INTERSIL		电信集成电路
页数	文件大小	规格书
24页	202K
描述
Digital Quadrature Tuner

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技术参数
数据手册

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HSP50110JC-52 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	PLCC	包装说明：	QCCJ,
针数：	84	Reach Compliance Code：	not_compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.65	JESD-30 代码：	S-PQCC-J84
JESD-609代码：	e0	长度：	29.31 mm
湿度敏感等级：	4	功能数量：	1
端子数量：	84	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	QCCJ	封装形状：	SQUARE
封装形式：	CHIP CARRIER	峰值回流温度（摄氏度）：	225
认证状态：	Not Qualified	座面最大高度：	4.57 mm
标称供电电压：	5 V	表面贴装：	YES
电信集成电路类型：	TELECOM CIRCUIT	温度等级：	COMMERCIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	J BEND
端子节距：	1.27 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	29.31 mm
Base Number Matches：	1

HSP50110JC-52 数据手册

HSP50110

Data Sheet

January 1999

File Number 3651.4

Digital Quadrature Tuner

Features

The Digital Quadrature Tuner (DQT) provides many of the

functions required for digital demodulation. These functions

include carrier LO generation and mixing, baseband

sampling, programmable bandwidth ﬁltering, baseband AGC,

and IF AGC error detection. Serial control inputs are provided

which can be used to interface with external symbol and

carrier tracking loops. These elements make the DQT ideal

for demodulator applications with multiple operational modes

or data rates. The DQT may be used with HSP50210 Digital

Costas Loop to function as a demodulator for BPSK, QPSK,

8-PSK OQPSK, FSK, FM, and AM signals.

• Input Sample Rates to 52 MSPS

• Internal AGC Loop for Output Level Stability

• Parallel or Serial Output Data Formats

• 10-Bit Real or Complex Inputs

• Bidirectional 8-Bit Microprocessor Interface

• Frequency Selectivity <0.013Hz

• Low Pass Filter Conﬁgurable as Three Stage Cascaded-

Integrator-Comb (CIC), Integrate and Dump, or Bypass

• Fixed Decimation from 1-4096, or Adjusted by NCO

Synchronization with Baseband Waveforms

The DQT processes a real or complex input digitized at rates

up to 52 MSPS. The channel of interest is shifted to DC by a

complex multiplication with the internal LO. The quadrature

LO is generated by a numerically controlled oscillator (NCO)

with a tuning resolution of 0.012Hz at a 52MHz sample rate.

The output of the complex multiplier is gain corrected and fed

into identical low pass FIR ﬁlters. Each ﬁlter is comprised of a

decimating low pass ﬁlter followed by an optional

• Input Level Detection for External IF AGC Loop

• Designed to Operate with HSP50210 Digital Costas Loop

• 84 Lead PLCC

Applications

compensation ﬁlter. The decimating low pass ﬁlter is a 3

stage Cascaded-Integrator-Comb (CIC) ﬁlter. The CIC ﬁlter

can be conﬁgured as an integrate and dump ﬁlter or a third

order CIC ﬁlter with a (sin(X)/X)³response. Compensation

ﬁlters are provided to ﬂatten the (sin(X)/X)^Nresponse of the

CIC. If none of the ﬁltering options are desired, they may be

bypassed. The ﬁlter bandwidth is set by the decimation rate of

the CIC ﬁlter. The decimation rate may be ﬁxed or adjusted

dynamically by a symbol tracking loop to synchronize the

output samples to symbol boundaries. The decimation rate

may range from 1-4096. An internal AGC loop is provided to

maintain the output magnitude at a desired level. Also, an

input level detector can be used to supply error signal for an

external IF AGC loop closed around the A/D.

• Satellite Receivers and Modems

• Complex Upconversion/Modulation

• Tuner for Digital Demodulators

• Digital PLL’s

• Related Products: HSP50210 Digital Costas Loop;

A/D Products HI5703, HI5746, HI5766

• HSP50110/210EVAL Digital Demod Evaluation Board

Ordering Information

TEMP.

PART NUMBER

HSP50110JC-52

HSP50110JI-52

RANGE ( C)

0 to 70

PACKAGE

84 Ld PLCC

PKG. NO.

N84.1.15

The DQT output is provided in either serial or parallel formats

to support interfacing with a variety DSP processors or digital

filter components. This device is configurable over a general

purpose 8-bit parallel bidirectional microprocessor control bus.

-40 to 85

Block Diagram

LOOP

FILTER

LEVEL

DETECT

COMPLEX

MULTIPLIER

GCA

LOW PASS FIR

FILTER

I DATA

REAL OR COMPLEX

CARRIER

TRACKING CONTROL

NCO

INPUT DATA

LOW PASS FIR

FILTER

Q DATA

GCA

DUMP

IF AGC

LEVEL

SAMPLE STROBE

CONTROL

DETECT

PROGRAMMABLE

RE-SAMPLING

NCO

CONTROL

SAMPLE RATE

CONTROL

CONTROL/STATUS

BUS

INTERFACE

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

3-229

12 3 4 5 6 7...24

中文翻译

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与HSP50110JC-52相关器件

型号	品牌	获取价格	描述	数据表
HSP50110JC-60	ETC	获取价格	Communications Tuner Circuit
HSP50110JI-52	INTERSIL	获取价格	Digital Quadrature Tuner
HSP50110JI-52Z	RENESAS	获取价格	Digital Quadrature Tuner; PLCC84; Temp Range: See Datasheet
HSP50210	INTERSIL	获取价格	Digital Costas Loop
HSP50210JC-52	INTERSIL	获取价格	Digital Costas Loop
HSP50210JC-52Z	INTERSIL	获取价格	Digital Costas Loop
HSP50210JI-52	INTERSIL	获取价格	Digital Costas Loop
HSP50210JI-52Z	INTERSIL	获取价格	Digital Costas Loop
HSP50214	INTERSIL	获取价格	Programmable Downconverter
HSP50214A	INTERSIL	获取价格	Programmable Downconverter

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