Datasheet > HSP43220JC-33

HSP43220JC-33

更新时间： 2024-11-13 22:07:39

品牌	Logo	应用领域
英特矽尔 - INTERSIL		外围集成电路 LTE 时钟
页数	文件大小	规格书
19页	193K
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Decimating Digital Filter

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HSP43220JC-33 数据手册

HSP43220

Data Sheet

February 1999

File Number 2486.7

Decimating Digital Filter

Features

The HSP43220 Decimating Digital Filter is a linear phase

low pass decimation ﬁlter which is optimized for ﬁltering

narrow band signals in a broad spectrum of a signal

processing applications. The HSP43220 offers a single chip

solution to signal processing applications which have

historically required several boards of ICs. This reduction in

component count results in faster development times as well

as reduction of hardware costs.

• Single Chip Narrow Band Filter with up to 96dB

Attenuation

• DC to 33MHz Clock Rate

• 16-Bit 2’s Complement Input

• 20-Bit Coefﬁcients in FIR

• 24-Bit Extended Precision Output

• Programmable Decimation up to a Maximum of 16,384

• Standard 16-Bit Microprocessor Interface

• Filter Design Software Available DECIMATE™

• Up to 512 Taps

The HSP43220 is implemented as a two stage ﬁlter

structure. As seen in the block diagram, the ﬁrst stage is a

high order decimation ﬁlter (HDF) which utilizes an efﬁcient

sample rate reduction technique to obtain decimation up to

1024 through a coarse low-pass ﬁltering process. The HDF

provides up to 96dB aliasing rejection in the signal pass

band. The second stage consists of a ﬁnite impulse

response (FIR) decimation ﬁlter structured as a transversal

FIR ﬁlter with up to 512 symmetric taps which can implement

ﬁlters with sharp transition regions. The FIR can perform

further decimation by up to 16 if required while preserving

the 96dB aliasing attenuation obtained by the HDF. The

combined total decimation capability is 16,384.

Applications

• Very Narrow Band Filters

• Zoom Spectral Analysis

• Channelized Receivers

• Large Sample Rate Converter

The HSP43220 accepts 16-bit parallel data in 2’s

complement format at sampling rates up to 33 MSPS. It

provides a 16-bit microprocessor compatible interface to

simplify the task of programming and three-state outputs to

allow the connection of several ICs to a common bus. The

HSP43220 also provides the capability to bypass either the

HDF or the FIR for additional ﬂexibility.

Ordering Information

TEMP.

PART NUMBER RANGE ( C)

PACKAGE

PKG. NO.

HSP43220VC-33

HSP43220JC-15

HSP43220JC-25

HSP43220JC-33

HSP43220GC-25

HSP43220GC-33

0 to 70

0 to 0

100 Ld MQFP Q100.14x20

84 Ld PLCC

84 Ld CPGA

N84.1.15

G84.A

0 to 70

G84.A

DECIMATE Software Development Tool (This software tool may be

downloaded from our Internet site: http://www.intersil.com)

Block Diagram

DECIMATION UP TO 1024

DECIMATION UP TO 16

INPUT CLOCK

HIGH ORDER

DECIMATION

FILTER

FIR

DECIMATION

FILTER

DATA OUT

DATA INPUT

DATA READY

CONTROL AND COEFFICIENTS

FIR CLOCK

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

DECIMATE™ is a trademark of Intersil Corporation.

3-194

12 3 4 5 6 7...19

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与HSP43220JC-33相关器件

型号	品牌	获取价格	描述	数据表
HSP43220JC-33Z	INTERSIL	获取价格	Decimating Digital Filter
HSP43220TM-15	ETC	获取价格	Digital Filter
HSP43220TM-25	ETC	获取价格	Digital Filter
HSP43220VC-25	ROCHESTER	获取价格	16-BIT, DSP-DIGITAL FILTER, PQFP100
HSP43220VC-33	INTERSIL	获取价格	Decimating Digital Filter
HSP43481	INTERSIL	获取价格	Digital Filter
HSP43481/883	INTERSIL	获取价格	Digital Filter
HSP43481883	INTERSIL	获取价格	Digital Filter
HSP43481GC-20	INTERSIL	获取价格	Digital Filter
HSP43481GC-25	INTERSIL	获取价格	Digital Filter

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