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HSP43220JC-33Z PDF预览

HSP43220JC-33Z

更新时间： 2024-01-11 01:16:35
品牌 Logo 应用领域
英特矽尔 - INTERSIL 外围集成电路LTE时钟
页数 文件大小 规格书
21页 475K
描述
Decimating Digital Filter

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HSP43220JC-33Z 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：PLCC包装说明：QCCJ, LDCC84,1.2SQ
针数：84Reach Compliance Code：compliant
风险等级：5.57Is Samacsys：N
其他特性：2S COMPLEMENT边界扫描：NO
最大时钟频率：33 MHz外部数据总线宽度：16
JESD-30 代码：S-PQCC-J84JESD-609代码：e3
长度：29.31 mm低功率模式：YES
湿度敏感等级：4端子数量：84
最高工作温度：70 °C最低工作温度：
输出数据总线宽度：24封装主体材料：PLASTIC/EPOXY
封装代码：QCCJ封装等效代码：LDCC84,1.2SQ
封装形状：SQUARE封装形式：CHIP CARRIER
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
认证状态：Not Qualified座面最大高度：4.57 mm
子类别：DSP Peripherals最大压摆率：120 mA
最大供电电压：5.25 V最小供电电压：4.75 V
标称供电电压：5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Matte Tin (Sn) - annealed端子形式：J BEND
端子节距：1.27 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：29.31 mm
uPs/uCs/外围集成电路类型：DSP PERIPHERAL, DIGITAL FILTERBase Number Matches：1

HSP43220JC-33Z 数据手册

 浏览型号HSP43220JC-33Z的Datasheet PDF文件第2页浏览型号HSP43220JC-33Z的Datasheet PDF文件第3页浏览型号HSP43220JC-33Z的Datasheet PDF文件第4页浏览型号HSP43220JC-33Z的Datasheet PDF文件第5页浏览型号HSP43220JC-33Z的Datasheet PDF文件第6页浏览型号HSP43220JC-33Z的Datasheet PDF文件第7页 
HSP43220  
®
Data Sheet  
October 10, 2008  
FN2486.10  
Decimating Digital Filter  
Features  
The HSP43220 Decimating Digital Filter is a linear phase  
low pass decimation filter which is optimized for filtering  
narrow band signals in a broad spectrum of a signal  
processing applications. The HSP43220 offers a single chip  
solution to signal processing applications which have  
historically required several boards of ICs. This reduction in  
component count results in faster development times as well  
as reduction of hardware costs.  
• Single Chip Narrow Band Filter with up to 96dB  
Attenuation  
• DC to 33MHz Clock Rate  
• 16-Bit 2’s Complement Input  
• 20-Bit Coefficients in FIR  
• 24-Bit Extended Precision Output  
• Programmable Decimation up to a Maximum of 16,384  
• Standard 16-Bit Microprocessor Interface  
• Filter Design Software Available DECIMATE™  
• Up to 512 Taps  
The HSP43220 is implemented as a two stage filter  
structure. As seen in the block diagram, the first stage is a  
high order decimation filter (HDF) which utilizes an efficient  
sample rate reduction technique to obtain decimation up to  
1024 through a coarse low-pass filtering process. The HDF  
provides up to 96dB aliasing rejection in the signal pass  
band. The second stage consists of a finite impulse  
response (FIR) decimation filter structured as a transversal  
FIR filter with up to 512 symmetric taps which can implement  
filters with sharp transition regions. The FIR can perform  
further decimation by up to 16 if required while preserving  
the 96dB aliasing attenuation obtained by the HDF. The  
combined total decimation capability is 16,384.  
• Pb-Free Available (RoHS compliant)  
Applications  
• Very Narrow Band Filters  
• Zoom Spectral Analysis  
• Channelized Receivers  
• Large Sample Rate Converter  
The HSP43220 accepts 16-bit parallel data in 2’s  
complement format at sampling rates up to 33MSPS. It  
provides a 16-bit microprocessor compatible interface to  
simplify the task of programming and three-state outputs to  
allow the connection of several ICs to a common bus. The  
HSP43220 also provides the capability to bypass either the  
HDF or the FIR for additional flexibility.  
Ordering Information  
TEMP.  
RANGE  
(°C)  
PART  
PART  
PKG.  
NUMBER  
MARKING  
PACKAGE DWG. #  
HSP43220JC-25 HSP43220JC-25  
0 to +70 84 Ld PLCC N84.1.15  
HSP43220JC-25Z HSP43220JC-25Z 0 to +70 84 Ld PLCC N84.1.15  
(Pb-free)  
HSP43220JC-33 HSP43220JC-33  
0 to +70 84 Ld PLCC N84.1.15  
HSP43220JC-33Z HSP43220JC-33Z 0 to +70 84 Ld PLCC N84.1.15  
(Pb-free)  
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-  
free material sets, molding compounds/die attach materials, and 100% matte  
tin plate plus anneal (e3 termination finish, which is RoHS compliant and  
compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free  
products are MSL classified at Pb-free peak reflow temperatures that meet or  
exceed the Pb-free requirements of IPC/JEDEC J STD-020.  
NOTE: DECIMATE Software Development Tool (This software tool  
may be downloaded from our internet site: www.intersil.com  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright © Intersil Americas Inc. 2000, 2004, 2008. All Rights Reserved  
DECIMATE™ is a trademark of Intersil Corporation.  
All other trademarks mentioned are the property of their respective owners.  
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