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HGT1S12N60C3 PDF预览

HGT1S12N60C3

更新时间: 2024-01-16 08:39:49
品牌 Logo 应用领域
哈里斯 - HARRIS 晶体晶体管电动机控制瞄准线双极性晶体管
页数 文件大小 规格书
6页 135K
描述
24A, 600V, UFS Series N-Channel IGBTs

HGT1S12N60C3 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:SMALL OUTLINE, R-PSSO-G2Reach Compliance Code:unknown
风险等级:5Is Samacsys:N
其他特性:LOW CONDUCTION LOSS外壳连接:COLLECTOR
最大集电极电流 (IC):24 A集电极-发射极最大电压:600 V
配置:SINGLE最大降落时间(tf):275 ns
门极发射器阈值电压最大值:6 V门极-发射极最大电压:20 V
JEDEC-95代码:TO-263ABJESD-30 代码:R-PSSO-G2
JESD-609代码:e0元件数量:1
端子数量:2最高工作温度:150 °C
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
极性/信道类型:N-CHANNEL最大功率耗散 (Abs):104 W
认证状态:Not Qualified子类别:Insulated Gate BIP Transistors
表面贴装:YES端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子位置:SINGLE
处于峰值回流温度下的最长时间:NOT SPECIFIED晶体管应用:MOTOR CONTROL
晶体管元件材料:SILICON标称断开时间 (toff):480 ns
标称接通时间 (ton):30 nsBase Number Matches:1

HGT1S12N60C3 数据手册

 浏览型号HGT1S12N60C3的Datasheet PDF文件第1页浏览型号HGT1S12N60C3的Datasheet PDF文件第2页浏览型号HGT1S12N60C3的Datasheet PDF文件第3页浏览型号HGT1S12N60C3的Datasheet PDF文件第4页浏览型号HGT1S12N60C3的Datasheet PDF文件第5页 
HGTP12N60C3, HGT1S12N60C3, HGT1S12N60C3S  
Test Circuit and Waveform  
90%  
OFF  
L = 100µH  
10%  
V
RHRP1560  
GE  
E
E
ON  
V
CE  
R
= 25Ω  
G
90%  
+
-
10%  
D(OFF)I  
V
= 480V  
DD  
I
CE  
t
t
RI  
t
FI  
t
D(ON)I  
FIGURE 18. INDUCTIVE SWITCHING TEST CIRCUIT  
FIGURE 19. SWITCHING TEST WAVEFORMS  
Handling Precautions for IGBTs  
Operating Frequency Information  
Insulated Gate Bipolar Transistors are susceptible to gate- Operating frequency information for  
a typical device  
insulation damage by the electrostatic discharge of energy Figure 13) is presented as a guide for estimating device per-  
through the devices. When handling these devices, care formance for a specific application. Other typical frequency  
should be exercised to assure that the static charge built in vs collector current (I ) plots are possible using the infor-  
CE  
the handler’s body capacitance is not discharged through mation shown for a typical unit in Figures 4, 7, 8, 11 and 12.  
the device. With proper handling and application procedures, The operating frequency plot (Figure 13) of a typical device  
however, IGBTs are currently being extensively used in pro- shows f  
or f  
whichever is smaller at each point.  
MAX1  
MAX2  
duction by numerous equipment manufacturers in military, The information is based on measurements of  
a
industrial and consumer applications, with virtually no dam- typical device and is bounded by the maximum rated junc-  
age problems due to electrostatic discharge. IGBTs can be tion temperature.  
handled safely if the following basic precautions are taken:  
f
is defined by f  
= 0.05/(t  
MAX1  
+ t ). Dead-  
D(OFF)I D(ON)I  
MAX1  
1. Prior to assembly into a circuit, all leads should be kept  
time (the denominator) has been arbitrarily held to 10% of  
shorted together either by the use of metal shorting the on- state time for a 50% duty factor. Other definitions are  
springs or by the insertion into conductive material such possible. t and t are defined in Figure 19.  
D(OFF)I  
Device turn-off delay can establish an additional frequency  
limiting condition for an application other than T  
D(ON)I  
as “ECCOSORBD LD26” or equivalent.  
.
JMAX  
is important when controlling output ripple under a  
2. When devices are removed by hand from their carriers,  
the hand being used should be grounded by any suitable  
means - for example, with a metallic wristband.  
t
D(OFF)I  
lightly loaded condition.  
f
is defined by f  
MAX2  
= (P - P )/(E  
OFF  
+ E ). The  
ON  
MAX2  
D
C
3. Tips of soldering irons should be grounded.  
allowable dissipation (P ) is defined by P = (T  
-
D
D
JMAX  
T )/R . The sum of device switching and conduction losses  
4. Devices should never be inserted into or removed from  
circuits with power on.  
C
θJC  
must not exceed P . A 50% duty factor was used (Figure 13)  
D
and the conduction losses (P ) are approximated by P = (V  
x I )/2.  
CE  
C
C
CE  
5. Gate Voltage Rating - Never exceed the gate-voltage rat-  
ing of V  
. Exceeding the rated V can result in per-  
GEM  
GE  
E
and E  
OFF  
are defined in the switching waveforms  
is the integral of the instantaneous  
is the inte-  
manent damage to the oxide layer in the gate region.  
ON  
shown in Figure 19. E  
power loss (I  
ON  
CE  
6. Gate Termination - The gates of these devices are es-  
sentially capacitors. Circuits that leave the gate open-cir-  
cuited or floating should be avoided. These conditions  
can result in turn-on of the device due to voltage buildup  
on the input capacitor due to leakage currents or pickup.  
x V ) during turn-on and E  
CE  
OFF  
gral of the instantaneous power loss (I x V ) during turn-  
CE CE  
off. All tail losses are included in the calculation for E  
OFF  
; i.e.  
the collector current equals zero (I  
= 0).  
CE  
7. Gate Protection - These devices do not have an internal  
monolithic zener diode from gate to emitter. If gate pro-  
tection is required an external zener is recommended.  
ECCOSORBD is a Trademark of Emerson and Cumming, Inc.  
3-34  

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