生命周期: | Contact Manufacturer | 零件包装代码: | SOIC |
包装说明: | SOP, | 针数: | 14 |
Reach Compliance Code: | compliant | HTS代码: | 8542.39.00.01 |
风险等级: | 5.3 | 系列: | LS |
JESD-30 代码: | R-PDSO-G14 | 长度: | 10.06 mm |
逻辑集成电路类型: | J-K FLIP-FLOP | 位数: | 2 |
功能数量: | 2 | 端子数量: | 14 |
最高工作温度: | 75 °C | 最低工作温度: | -20 °C |
输出极性: | COMPLEMENTARY | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | SOP | 封装形状: | RECTANGULAR |
封装形式: | SMALL OUTLINE | 传播延迟(tpd): | 20 ns |
认证状态: | Not Qualified | 座面最大高度: | 2.2 mm |
标称供电电压 (Vsup): | 5 V | 表面贴装: | YES |
技术: | TTL | 温度等级: | COMMERCIAL EXTENDED |
端子形式: | GULL WING | 端子节距: | 1.27 mm |
端子位置: | DUAL | 触发器类型: | NEGATIVE EDGE |
宽度: | 5.5 mm | 最小 fmax: | 30 MHz |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
HD74LS73AP | RENESAS |
获取价格 |
Dual J-K Flip-Flops (with Clear) | |
HD74LS73AP-E | RENESAS |
获取价格 |
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14, 6.30 | |
HD74LS73ARP | ETC |
获取价格 |
FLIP-FLOP|DUAL|J/K TYPE|LS-TTL|SOP|14PIN|PLASTIC | |
HD74LS73ARPEL | RENESAS |
获取价格 |
Dual J-K Flip-Flops (with Clear) | |
HD74LS73ARP-EL | HITACHI |
获取价格 |
J-K Flip-Flop, LS Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TT | |
HD74LS73ARP-EL | RENESAS |
获取价格 |
J-K Flip-Flop, LS Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TT | |
HD74LS73P | ETC |
获取价格 |
J-K-Type Flip-Flop | |
HD74LS74 | HITACHI |
获取价格 |
Dual D-type Positive Edge-triggered Flip-Flops(With Preset and Clear) | |
HD74LS74A | HITACHI |
获取价格 |
Dual D-type Positive Edge-triggered Flip-Flops(With Preset and Clear) | |
HD74LS74A | RENESAS |
获取价格 |
Dual D-type Positive Edge-triggered Flip-Flops (with Preset and Clear) |