April 2000
TM
QFET
FQD1N60 / FQU1N60
600V N-Channel MOSFET
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply.
•
•
•
•
•
•
1.0A, 600V, R
= 11.5Ω @V = 10 V
DS(on) GS
Low gate charge ( typical 5.0 nC)
Low Crss ( typical 3.0 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
D
!
D
"
! "
"
"
G !
I-PAK
FQU Series
D-PAK
FQD Series
G
S
G
D
S
!
S
Absolute Maximum Ratings
ꢀꢀ
T = 25°C unless otherwise noted
C
Symbol
Parameter
FQD1N60 / FQU1N60
Units
V
V
I
Drain-Source Voltage
600
1.0
DSS
- Continuous (T = 25°C)
Drain Current
A
D
C
- Continuous (T = 100°C)
0.63
4.0
A
C
I
(Note 1)
Drain Current
- Pulsed
A
DM
V
E
I
Gate-Source Voltage
±ꢀ30
50
V
GSS
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Single Pulsed Avalanche Energy
Avalanche Current
mJ
A
AS
1.0
AR
E
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
3.0
mJ
V/ns
W
AR
dv/dt
4.5
Power Dissipation (T = 25°C) *
2.5
P
A
D
Power Dissipation (T = 25°C)
30
W
C
- Derate above 25°C
Operating and Storage Temperature Range
0.24
-55 to +150
W/°C
°C
T , T
J
STG
Maximum lead temperature for soldering purposes,
T
300
°C
L
1/8ꢀꢁfrom case for 5 seconds
Thermal Characteristics
Symbol
Parameter
Typ
--
Max
4.17
50
Units
°CꢁW
°CꢁW
°CꢁW
R
R
R
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
θ
θ
θ
JC
JA
JA
--
--
110
* When mounted on the minimum pad size recommended (PCB Mount)
©2000 Fairchild Semiconductor International
Rev. A, April 2000