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FIN1022M_NL PDF预览

FIN1022M_NL

更新时间: 2024-10-27 13:07:47
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 开关
页数 文件大小 规格书
10页 549K
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FIN1022M_NL 数据手册

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September 2001  
Revised December 2001  
FIN1022  
2 X 2 LVDS High Speed Crosspoint Switch  
General Description  
Features  
This non-blocking 2x2 crosspoint switch has a fully differ-  
ential input to output data path for low noise generation and  
low pulse width distortion. The device can be used as a  
high speed crosspoint switch, 2:1 multiplexer, 1:2 demulti-  
plexer or 1:2 signal splitter. The inputs can directly interface  
with LVDS and LVPECL levels.  
Low jitter, 800 Mbps full differential data path  
Worst case jitter of 190ps  
with PRBS = 223 1 data pattern at 800 Mbps  
Rail-to-rail common mode range is 0.5V to 3.25V  
Worst case power dissipation is less than 126 mW  
Open-circuit fail safe protection  
Fast switch time of 1.1 ns typical  
35 ps typical pin channel to channel skew  
3.3V power supply operation  
Non-blocking switch  
LVDS receiver inputs accept LVPECL signals directly  
7.5 kV HBM ESD protection  
16-lead SOIC package and TSSOP package  
Inter-operates with TIA/EIA 644-1995 specification  
See the Fairchild Interface Solutions web page for cross  
reference information:  
www.fairchildsemi.com/products/interface/lvds.html  
Ordering Code:  
Order Number Package Number  
Package Description  
FIN1022M  
M16A  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
FIN1022MTC  
MTC16  
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
© 2001 Fairchild Semiconductor Corporation  
DS500653  
www.fairchildsemi.com  

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