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EMB20N03VZ PDF预览

EMB20N03VZ

更新时间: 2024-11-22 17:15:31
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杰力科技 - EXCELLIANCE /
页数 文件大小 规格书
7页 464K
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EDFN3X3

EMB20N03VZ 数据手册

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EMB20N03VZ  
Single N-Channel Logic Level Enhancement Mode Field Effect Transistor  
▪Product Summary:  
▪ Pin Description:  
N-CH  
30V  
20.0mΩ  
30.0mΩ  
22.0A  
7.0A  
BVDSS  
RDSON (MAX.)@VGS=10V  
RDSON (MAX.)@VGS=4.5V  
ID @TC=25  
ID @TA=25℃  
Single N Channel MOSFET  
UIS, Rg 100% Tested  
Pb-Free Lead Plating & Halogen Free  
▪ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)  
PARAMETERS/TEST CONDITIONS SYMBOL  
Gate-Source Voltage  
LIMITS  
UNIT  
VGS  
ID  
±20  
22  
22  
7
V
TC = 25 °C  
TC = 100 °C  
TA = 25 °C  
TA = 70 °C  
Continuous Drain Current  
ID  
Continuous Drain Current  
A
6
Pulsed Drain Current1  
Avalanche Current  
IDM  
IAS  
70  
18  
Avalanche Energy  
L = 0.1mH  
L = 0.05mH  
TC = 25 °C  
TC = 100 °C  
TA = 25 °C  
TA = 70 °C  
16.2  
8.1  
62.5  
25  
2.1  
1.3  
EAS  
EAR  
mJ  
W
Repetitive Avalanche Energy2  
PD  
Power Dissipation  
Power Dissipation  
PD  
W
°C  
Operating Junction & Storage Temperature Range  
Tj, Tstg  
-55 to 150  
100% UIS testing in condition of VD=15V, L=0.1mH, VG=10V, IL=11A, Rated VDS=30V N-CH  
▪THERMAL RESISTANCE RATINGS  
THERMAL RESISTANCE  
SYMBOL  
TYPICAL  
MAXIMUM  
UNIT  
RθJC  
RθJA  
Junction-to-Case  
Junction-to-Ambient3  
2
°C/W  
60  
1Pulse width limited by maximum junction temperature.  
2Duty cycle < 1%  
360°C / W when mounted on a 1 in2 pad of 2 oz copper.  
4Guarantee by Engineering test  
2020/4/20  
A.0  
P.1