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DS1350ABP-100 PDF预览

DS1350ABP-100

更新时间: 2024-02-23 00:26:59
品牌 Logo 应用领域
其他 - ETC 电池内存集成电路静态存储器
页数 文件大小 规格书
12页 191K
描述
NVRAM (Battery Based)

DS1350ABP-100 技术参数

生命周期:Transferred包装说明:POWERCAP MODULE-34
Reach Compliance Code:unknown风险等级:5.69
Is Samacsys:N最长访问时间:100 ns
其他特性:10 YEAR DATA RETENTIONJESD-30 代码:R-XDMA-U34
内存密度:4194304 bit内存集成电路类型:NON-VOLATILE SRAM MODULE
内存宽度:8功能数量:1
端口数量:1端子数量:34
字数:524288 words字数代码:512000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:512KX8
输出特性:3-STATE可输出:YES
封装主体材料:UNSPECIFIED封装等效代码:MODULE,34LEAD,1.0
封装形状:RECTANGULAR封装形式:MICROELECTRONIC ASSEMBLY
并行/串行:PARALLEL电源:5 V
认证状态:Not Qualified最大待机电流:0.00015 A
子类别:SRAMs最大压摆率:0.085 mA
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:MOS温度等级:INDUSTRIAL
端子形式:J INVERTED端子位置:DUAL
Base Number Matches:1

DS1350ABP-100 数据手册

 浏览型号DS1350ABP-100的Datasheet PDF文件第2页浏览型号DS1350ABP-100的Datasheet PDF文件第3页浏览型号DS1350ABP-100的Datasheet PDF文件第4页浏览型号DS1350ABP-100的Datasheet PDF文件第5页浏览型号DS1350ABP-100的Datasheet PDF文件第6页浏览型号DS1350ABP-100的Datasheet PDF文件第7页 
DS1350Y/AB  
4096k Nonvolatile SRAM  
with Battery Monitor  
www.maxim-ic.com  
FEATURES  
PIN ASSIGNMENT  
C 10 years minimum data retention in the  
absence of external power  
A18  
A17  
A14  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
1
2
3
BW  
A15  
A16  
C
Data is automatically protected during power  
loss  
A13  
A12  
A11  
A10  
A9  
4
5
6
7
8
9
RST  
VCC  
C Power supply monitor resets processor when  
VCC power loss occurs and holds processor in  
reset during VCC ramp-up  
WE  
OE  
CE  
A8  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
10  
11  
12  
13  
14  
15  
16  
17  
C Battery monitor checks remaining capacity  
daily  
GND VBAT  
DQ2  
DQ1  
DQ0  
GND  
C Read and write access times as fast as 70ns  
C Unlimited write cycle endurance  
C Typical standby current 50A  
C Upgrade for 512k x 8 SRAM, EEPROM, or  
Flash  
34-Pin PowerCap Module (PCM)  
(Uses DS9034PC PowerCap)  
C Lithium battery is electrically disconnected to  
retain freshness until power is applied for the  
first time  
PIN DESCRIPTION  
A0 – A18  
DQ0 – DQ7  
CE  
WE  
OE  
RST  
BW  
- Address Inputs  
- Data In/Data Out  
- Chip Enable  
- Write Enable  
- Output Enable  
- Reset Output  
- Battery Warning  
- Power (+5V)  
- Ground  
C Full M10% VCC operating range (DS1350Y)  
or optional M5% VCC operating range  
(DS1350AB)  
C Optional industrial temperature range of  
-40LC to +85LC, designated IND  
C PowerCap Module (PCM) package  
-
-
Directly surface-mountable module  
Replaceable snap-on PowerCap provides  
lithium backup battery  
VCC  
GND  
-
-
Standardized pinout for all nonvolatile  
(NV) SRAM products  
Detachment feature on PowerCap allows  
easy removal using a regular screwdriver  
DESCRIPTION  
The DS1350 4096k NV SRAMs are 4,194,304 bit, fully static, NV SRAMs organized as 524,288 words  
by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry, which  
constantly monitors VCC for an out-of-tolerance condition. When such a condition occurs, the lithium  
energy source is automatically switched on and write protection is unconditionally enabled to prevent  
data corruption. Additionally, the DS1350 devices have dedicated circuitry for monitoring the status of  
VCC and the status of the internal lithium battery. DS1350 devices in the PowerCap Module package are  
directly surface mountable and are normally paired with a DS9034PC PowerCap to form a complete NV  
SRAM module. The devices can be used in place of 512k x 8 SRAM, EEPROM or Flash components.  
1 of 12  
110201  

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