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DS1350WP-100 PDF预览

DS1350WP-100

更新时间: 2024-11-09 20:57:27
品牌 Logo 应用领域
达拉斯 - DALLAS 静态存储器内存集成电路
页数 文件大小 规格书
11页 108K
描述
Non-Volatile SRAM, 512KX8, 100ns, CMOS,

DS1350WP-100 技术参数

生命周期:ObsoleteReach Compliance Code:unknown
风险等级:5.69最长访问时间:100 ns
内存密度:4194304 bit内存集成电路类型:NON-VOLATILE SRAM
内存宽度:8混合内存类型:N/A
端子数量:34字数:524288 words
字数代码:512000最高工作温度:70 °C
最低工作温度:组织:512KX8
封装主体材料:PLASTIC/EPOXY封装等效代码:MODULE,34LEAD,1.0
封装形式:MICROELECTRONIC ASSEMBLY电源:3.3 V
认证状态:Not Qualified最大待机电流:0.00015 A
子类别:SRAMs最大压摆率:0.05 mA
标称供电电压 (Vsup):3.3 V技术:CMOS
温度等级:COMMERCIALBase Number Matches:1

DS1350WP-100 数据手册

 浏览型号DS1350WP-100的Datasheet PDF文件第2页浏览型号DS1350WP-100的Datasheet PDF文件第3页浏览型号DS1350WP-100的Datasheet PDF文件第4页浏览型号DS1350WP-100的Datasheet PDF文件第5页浏览型号DS1350WP-100的Datasheet PDF文件第6页浏览型号DS1350WP-100的Datasheet PDF文件第7页 
DS1350W  
PRELIMINARY  
DS1350W  
3.3V 4096K Nonvolatile SRAM  
with Battery Monitor  
FEATURES  
PIN ASSIGNMENT  
10 years minimum data retention in the absence of  
external power  
BW  
A15  
A16  
RST  
1
2
3
4
5
6
7
8
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
A18  
A17  
A14  
A13  
A12  
A11  
A10  
A9  
A8  
A7  
A6  
A5  
Data is automatically protected during power loss  
Power supply monitor resets processor when V  
powerloss occurs andholdsprocessorinresetduring  
V
CC  
CC  
WE  
OE  
CE  
V
CC  
ramp–up  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
DQ2  
DQ1  
DQ0  
GND  
9
Battery monitor checks remaining capacity daily  
Read and write access times as fast as 150 ns  
Unlimited write cycle endurance  
10  
11  
12  
13  
14  
15  
16  
17  
A4  
A3  
A2  
A1  
GND  
V
BAT  
Typical standby current 50 µA  
A0  
Upgrade for 512K x 8 SRAM, EEPROM or Flash  
34–PIN POWERCAP MODULE (PCM)  
(USES DS9034PC POWERCAP)  
Lithium battery is electrically disconnected to retain  
freshness until power is applied for the first time  
PIN DESCRIPTION  
Optional industrial temperature range of –40°C to  
+85°C, designated IND  
A0–A18  
DQ0–DQ7  
CE  
Address Inputs  
Data In/Data Out  
Chip Enable  
New PowerCap Module (PCM) package  
Directly surface–mountable module  
Replaceable snap–on PowerCap provides lith-  
ium backup battery  
WE  
Write Enable  
OE  
RST  
BW  
Output Enable  
Reset Output  
Battery Warning Output  
Power (+3.3 Volts)  
Ground  
Standardized pinout for all nonvolatile SRAM  
products  
Detachment feature on PowerCap allows easy  
removal using a regular screwdriver  
V
CC  
GND  
NC  
No Connect  
DESCRIPTION  
The DS1350W 3.3V 4096K Nonvolatile SRAM is a  
4,194,304–bit, fully static, nonvolatile SRAM organized  
as 524,288 words by eight bits. Each NV SRAM has a  
self–contained lithium energy source and control cir-  
data corruption. Additionally, the DS1350W has dedi-  
cated circuitry for monitoring the status of V and the  
CC  
status of the internal lithium battery. DS1350W devices  
in the PowerCap Module package are directly surface  
mountable and are normally paired with a DS9034PC  
PowerCap to form a complete Nonvolatile SRAM mod-  
ule. The devices can be used in place of 512K x 8  
SRAM, EEPROM or Flash components.  
cuitry which constantly monitors V for an out–of–tol-  
CC  
erance condition. When such a condition occurs, the  
lithium energy source is automatically switched on and  
write protection is unconditionally enabled to prevent  
022598 1/11  

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