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DP5Z1MW32PV3-15C PDF预览

DP5Z1MW32PV3-15C

更新时间: 2024-09-20 23:47:55
品牌 Logo 应用领域
其他 - ETC 闪存内存集成电路可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
18页 726K
描述
x32 Flash EEPROM Module

DP5Z1MW32PV3-15C 数据手册

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32 Megabit FLASH EEPROM  
DP5Z1MW32PV3  
PRELIMINARY  
DESCRIPTION:  
The DP5Z1MW32PV3 ‘’VERSA-STACK’’ module is a revolutionary new  
memory subsystem using Dense-Pac Microsystems’ ceramic Stackable  
Leadless Chip Carriers (SLCC) mounted on a co-fired ceramic substrate. It  
offers 32 Megabits of FLASH EEPROM in a single package envelope of 1.090"  
x 1.090" x .163".  
The DP5Z1MW32PV3 is built with 2 SLCC packages each containing a 1Meg  
x 16 FLASH memory devices. Each SLCC is hermetically sealed making the  
module suitable for commercial, industrial and military applications.  
By using SLCCs, the ‘’Versa-Stack’’ family of modules offers a higher board  
density of memory than available with conventional through-hole, surface  
mount, module or hybrid techniques.  
FEATURES:  
Organizations Available: 1 Meg x 32, 2 Meg x 16  
PIN NAMES  
A0 - A19  
I/O0 - I/O31  
CE0, CE1  
WE  
Address Inputs  
Data Input/Output  
Chip Enables  
Write Enables  
Output Enables  
Power (+5 Volts)  
Ground  
Fast Access Times: 120, 150, 200ns (max.)  
Single 5.0 Volt  
High-Density Symmetrically Blocked Architecture  
-
Sixteen 128 Kbyte Blocks Per Device  
OE  
Extended Cycling Capability  
100K Write/Erase Cycles  
VDD  
-
VSS  
Automated Erase and Program Cycles  
N.C.  
No Connect  
-
-
Command User Interface  
Status Register  
SRAM-Compatible Write Interface  
Hardware Data Protection Feature  
FUNCTIONAL BLOCK DIAGRAM  
-
Erase / Write Lockout during  
Power Transitions  
66 - Pin PGA ‘’VERSA-STACK’’ Package  
PIN-OUT DIAGRAM  
This document contains information on a product presently under  
development at Dense-Pac Microsystems, Inc. Dense-Pac reserves the  
right to change products or specifications herein without prior notice.  
30A180-11  
Rev. C  
1

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