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CY7C266-25JC PDF预览

CY7C266-25JC

更新时间: 2024-09-17 00:00:55
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 开关电源开关可编程只读存储器
页数 文件大小 规格书
11页 263K
描述
8Kx8 Power-Switched and Reprogrammable PROM

CY7C266-25JC 数据手册

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1CY7C266  
CY7C266  
8Kx8 Power-Switched and  
Reprogrammable PROM  
powers down into a low-power standby mode. It is packaged  
in a 600-mil-wide package. The reprogrammable packages  
are equipped with an erasure window; when exposed to UV  
light, these PROMs are erased and can then be repro-  
grammed. The memory cells utilize proven EPROM  
Features  
• CMOS for optimum speed/power  
• Windowed for reprogrammability  
• High speed  
floating-gate  
technology  
and  
byte-wide  
intelligent  
— 20 ns (Commercial)  
programming algorithms.  
• Low power  
The CY7C266 is a plug-in replacement for EPROM devices.  
The EPROM cell requires only 12.5V for the super voltage and  
low-current requirements allow for gang programming. The  
EPROM cells allow for each memory location to be tested  
100%, as each location is written into, erased, and repeatedly  
exercised prior to encapsulation. Each PROM is also tested  
for AC performance to guarantee that after customer  
programming, the product will meet DC and AC specification  
limits.  
— 660 mW (Commercial)  
• Super low standby power  
— Less than 85 mW when deselected  
• EPROM technology 100% programmable  
5V ±10% VCC, commercial and military  
• TTL-compatible I/O  
• Direct replacement for 27C64 EPROMs  
Reading is accomplished by placing an active LOW signal on  
OE and CE. The contents of the memory location addressed  
by the address lines (A0 through A12) will become available on  
the output lines (O0 through O7).  
Functional Description  
The CY7C266 is a high-performance 8192-word by 8-bit  
CMOS PROM. When deselected, the CY7C266 automatically  
Logic Block Diagram  
Pin Configurations  
CerDIP  
O
O
7
Top View  
A
0
1
28  
27  
26  
V
V
CC  
CC  
A
1
2
A
V
CC  
12  
A
2
3
A
7
6
NC  
ROW  
PROGRAMMABLE  
ARRAY  
A
6
4
MULTIPLEXER  
25  
24  
23  
22  
21  
A
8
ADDRESS  
A
3
A
5
5
A
9
A
4
6
A
4
A
11  
A
3
A
2
7
8
OE  
O
O
5
A
5
A
10  
A
1
9
20  
19  
18  
17  
16  
7C266  
CE  
A
6
A
0
10  
11  
12  
13  
O
7
O
6
ADDRESS  
DECODER  
A
7
O
0
4
O
1
O
5
A
8
O
2
O
4
A
9
GND  
O
3
14  
15  
O
COLUMN  
ADDRESS  
3
A
10  
11  
LCC  
Top View  
A
A
12  
O
O
2
4
3
2
323130  
1
A
8
A
29  
6
POWER DOWN  
5
6
7
8
9
10  
11  
12  
13  
A
A
5
4
28  
27  
9
A
A
11  
1
A
3
26 NC  
A
2
OE  
10  
25  
24  
A
A
1
A
0
23 CE  
7C266  
NC  
O
0
O
7
O
6
22  
21  
O
0
14151617 181920  
CE  
OE  
Cypress Semiconductor Corporation  
Document #: 38-04005 Rev. *B  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
Revised December 27, 2002  

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