046BV33
PRELIMINARY
CY7C1046BV33
1M x 4 Static RAM
expansion is provided by an active LOW Chip Enable (CE), an
active LOW Output Enable (OE), and three-state drivers. Writ-
ing to the device is accomplished by taking Chip Enable (CE)
and Write Enable (WE) inputs LOW. Data on the four I/O pins
(I/O0 through I/O3) is then written into the location specified on
the address pins (A0 through A19).
Features
• High speed
— tAA = 10 ns
• Low active power for 10 ns speed
— 540 mW (max.)
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH. Under these conditions, the contents of
the memory location specified by the address pins will appear
on the I/O pins.
• Low CMOS standby power (L version)
— 1.8 mW (max.)
• 2.0V Data Retention (400 µW at 2.0V retention)
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features
The four input/output pins (I/O0 through I/O3) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW, and WE LOW).
Functional Description
The CY7C1046BV33 is available in a standard 400-mil-wide
32-pin SOJ package with center power and ground (revolution-
ary) pinout.
The CY7C1046BV33 is a high-performance CMOS static
RAM organized as 1,048,576 words by 4 bits. Easy memory
Logic Block Diagram
Pin Configuration
SOJ
Top View
A
32
31
30
29
28
1
2
3
4
5
6
A
0
19
A
1
A
A
A
A
18
17
16
15
A
2
A
A
3
4
INPUT BUFFER
A
0
CE
27
26
25
OE
I/O
GND
A
1
I/O
7
8
0
A
3
2
I/O
0
V
A
CC
3
4
A
24
23
GND
9
10
11
V
I/O
CC
A
6
I/O
I/O
I/O
5
1
2
3
1M x 4
I/O
A
2
1
ARRAY
A
WE
22
21
20
19
18
17
A
7
14
13
12
A
8
A
A
A
A
A
A
12
13
14
15
16
5
9
A
6
A
10
A
7
11
10
A
8
POWER
DOWN
COLUMN
DECODER
A
CE
NC
9
WE
1046BV33–1
1046BV33–2
OE
Selection Guide
7C1046BV33-10 7C1046BV33-12 7C1046BV33-15
Maximum Access Time (ns)
10
150
8
12
140
8
15
130
8
Maximum Operating Current (mA)
Maximum CMOS Standby
Current (mA)
Com’l
L version
0.5
0.5
0.5
Shaded areas contain advance information.
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
Document #: 38-05170 Rev. **
Revised September 21, 2001