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CY7C1021CV33-10BAC

更新时间： 2024-11-10 22:09:35
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 内存集成电路静态存储器
页数 文件大小 规格书
12页 233K
描述
64K x 16 Static RAM

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CY7C1021CV33-10BAC 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：BGA包装说明：7 X 7 MM, 1.20 MM HEIGHT, FBGA-48
针数：48Reach Compliance Code：not_compliant
ECCN代码：3A991.B.2.BHTS代码：8542.32.00.41
风险等级：5.62最长访问时间：10 ns
I/O 类型：COMMONJESD-30 代码：S-PBGA-B48
JESD-609代码：e0长度：7 mm
内存密度：1048576 bit内存集成电路类型：STANDARD SRAM
内存宽度：16湿度敏感等级：3
功能数量：1端子数量：48
字数：65536 words字数代码：64000
工作模式：ASYNCHRONOUS最高工作温度：70 °C
最低工作温度：组织：64KX16
输出特性：3-STATE封装主体材料：PLASTIC/EPOXY
封装代码：TFBGA封装等效代码：BGA48,6X8,30
封装形状：SQUARE封装形式：GRID ARRAY, THIN PROFILE, FINE PITCH
并行/串行：PARALLEL峰值回流温度（摄氏度）：240
电源：3.3 V认证状态：Not Qualified
座面最大高度：1.2 mm最大待机电流：0.005 A
最小待机电流：3 V子类别：SRAMs
最大压摆率：0.09 mA最大供电电压 (Vsup)：3.63 V
最小供电电压 (Vsup)：2.97 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：BALL端子节距：0.75 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：30
宽度：7 mmBase Number Matches：1

CY7C1021CV33-10BAC 数据手册

 浏览型号CY7C1021CV33-10BAC的Datasheet PDF文件第2页浏览型号CY7C1021CV33-10BAC的Datasheet PDF文件第3页浏览型号CY7C1021CV33-10BAC的Datasheet PDF文件第4页浏览型号CY7C1021CV33-10BAC的Datasheet PDF文件第5页浏览型号CY7C1021CV33-10BAC的Datasheet PDF文件第6页浏览型号CY7C1021CV33-10BAC的Datasheet PDF文件第7页 
CY7C1021CV33  
64K x 16 Static RAM  
(BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is  
written into the location specified on the address pins (A0  
through A15). If Byte High Enable (BHE) is LOW, then data  
from I/O pins (I/O9 through I/O16) is written into the location  
specified on the address pins (A0 through A15).  
Features  
• Pin- and function-compatible with CY7C1021BV33  
• High speed  
— tAA = 8, 10, 12, and 15 ns  
Reading from the device is accomplished by taking Chip  
Enable (CE) and Output Enable (OE) LOW while forcing the  
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,  
then data from the memory location specified by the address  
pins will appear on I/O1 to I/O8. If Byte High Enable (BHE) is  
LOW, then data from memory will appear on I/O9 to I/O16. See  
the truth table at the end of this data sheet for a complete  
description of Read and Write modes.  
• CMOS for optimum speed/power  
• Low active power  
— 360 mW (max.)  
• Data retention at 2.0V  
• Automatic power-down when deselected  
• Independent control of upper and lower bits  
• Available in 44-pin TSOP II, 400-mil SOJ, 48-ball FBGA  
The input/output pins (I/O1 through I/O16) are placed in a  
high-impedance state when the device is deselected (CE  
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE  
are disabled (BHE, BLE HIGH), or during a Write operation  
(CE LOW, and WE LOW).  
Functional Description  
The CY7C1021CV33 is a high-performance CMOS static  
RAM organized as 65,536 words by 16 bits. This device has  
an automatic power-down feature that significantly reduces  
power consumption when deselected.  
The CY7C1021CV33 is available in standard 44-pin TSOP  
Type II 400-mil-wide SOJ packages, as well as a 48-ball  
FBGA.  
Writing to the device is accomplished by taking Chip Enable  
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable  
Logic Block Diagram  
Pin Configuration  
SOJ / TSOP II  
DATA IN DRIVERS  
Top View  
44  
1
A
4
A
5
43  
42  
41  
40  
39  
38  
A
A
2
3
4
5
6
3
6
A
A
2
7
A
A
A
7
6
5
4
OE  
A
1
BHE  
BLE  
I/O  
I/O  
I/O  
A
0
64K x 16  
CE  
A
A
A
A
I/O –I/O  
RAM Array  
512 X 2048  
I/O  
1
8
7
1
16  
37  
36  
35  
34  
33  
3
2
I/O  
I/O  
8
2
3
15  
14  
13  
I/O –I/O  
9
9
16  
10  
11  
12  
13  
I/O  
V
SS  
I/O  
1
0
4
CC  
V
SS  
A
V
V
CC  
32  
I/O  
I/O  
I/O  
5
6
7
8
12  
11  
31  
30  
29  
28  
I/O  
I/O  
I/O  
14  
15  
16  
I/O  
I/O  
10  
9
COLUMN DECODER  
WE 17  
NC  
18  
27  
26  
25  
A
A
8
15  
BHE  
19  
A
A
14  
13  
9
10  
11  
WE  
CE  
OE  
A
20  
21  
22  
A
A
A
12  
24  
23  
NC  
NC  
BLE  
Selection Guide  
CY7C1021CV33-8 CY7C1021CV33-10 CY7C1021CV33-12 CY7C1021CV33-15 Unit  
8
95  
5
10  
90  
5
12  
85  
5
15  
80  
5
ns  
Maximum Access Time  
mA  
mA  
Maximum Operating Current  
Maximum CMOS Standby Current  
Cypress Semiconductor Corporation  
•
3901 North First Street  
•
San Jose  
•
CA 95134  
•
408-943-2600  
Document #: 38-05132 Rev. *C  
Revised October 30, 2002  
1234567...12

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与CY7C1021CV33-10BAC相关器件

型号 品牌 获取价格 描述 数据表
CY7C1021CV33-10BACT CYPRESS

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 		暂无描述
CY7C1021CV33-10BACT ROCHESTER

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 		Standard SRAM, 64KX16, 10ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48
CY7C1021CV33-10BAI CYPRESS

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 		64K x 16 Static RAM
CY7C1021CV33-10BAI ROCHESTER

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 		Standard SRAM, 64KX16, 10ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48
CY7C1021CV33-10BAIT CYPRESS

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 		Standard SRAM, 64KX16, 10ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48
CY7C1021CV33-10BAXC ROCHESTER

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 		64KX16 STANDARD SRAM, 10ns, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-48
CY7C1021CV33-10BAXC CYPRESS

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 		Standard SRAM, 64KX16, 10ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-48
CY7C1021CV33-10BAXCT CYPRESS

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 		Standard SRAM, 64KX16, 10ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-48
CY7C1021CV33-10BAXI CYPRESS

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 		1-Mbit (64K x 16) Static RAM
CY7C1021CV33-10BAXIT CYPRESS

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 		Standard SRAM, 64KX16, 10ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-48

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