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CY7C1021CV33-12BAE PDF预览

CY7C1021CV33-12BAE

更新时间： 2024-11-11 05:19:03
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 存储内存集成电路静态存储器
页数 文件大小 规格书
13页 388K
描述
1-Mbit (64K x 16) Static RAM

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中文翻译

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CY7C1021CV33-12BAE 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：BGA包装说明：7 X 7 MM, 1.20 MM HEIGHT, FBGA-48
针数：48Reach Compliance Code：not_compliant
ECCN代码：3A991.B.2.BHTS代码：8542.32.00.41
风险等级：5.35最长访问时间：12 ns
I/O 类型：COMMONJESD-30 代码：S-PBGA-B48
JESD-609代码：e0长度：7 mm
内存密度：1048576 bit内存集成电路类型：STANDARD SRAM
内存宽度：16湿度敏感等级：3
功能数量：1端子数量：48
字数：65536 words字数代码：64000
工作模式：ASYNCHRONOUS最高工作温度：125 °C
最低工作温度：-40 °C组织：64KX16
输出特性：3-STATE封装主体材料：PLASTIC/EPOXY
封装代码：TFBGA封装等效代码：BGA48,6X8,30
封装形状：SQUARE封装形式：GRID ARRAY, THIN PROFILE, FINE PITCH
并行/串行：PARALLEL峰值回流温度（摄氏度）：240
电源：3.3 V认证状态：Not Qualified
筛选级别：AEC-Q100座面最大高度：1.2 mm
最大待机电流：0.01 A最小待机电流：3 V
子类别：SRAMs最大压摆率：0.085 mA
最大供电电压 (Vsup)：3.63 V最小供电电压 (Vsup)：2.97 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：AUTOMOTIVE
端子面层：Tin/Lead (Sn/Pb)端子形式：BALL
端子节距：0.75 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：30宽度：7 mm
Base Number Matches：1

CY7C1021CV33-12BAE 数据手册

 浏览型号CY7C1021CV33-12BAE的Datasheet PDF文件第2页浏览型号CY7C1021CV33-12BAE的Datasheet PDF文件第3页浏览型号CY7C1021CV33-12BAE的Datasheet PDF文件第4页浏览型号CY7C1021CV33-12BAE的Datasheet PDF文件第5页浏览型号CY7C1021CV33-12BAE的Datasheet PDF文件第6页浏览型号CY7C1021CV33-12BAE的Datasheet PDF文件第7页 
CY7C1021CV33  
1-Mbit (64K x 16) Static RAM  
Features  
Functional Description[1]  
• Temperature Ranges  
The CY7C1021CV33 is a high-performance CMOS static  
RAM organized as 65,536 words by 16 bits. This device has  
an automatic power-down feature that significantly reduces  
power consumption when deselected.  
— Commercial: 0°C to 70°C  
— Industrial: –40°C to 85°C  
— Automotive-A: –40°C to 85°C  
— Automotive-E: –40°C to 125°C  
• Pin- and function-compatible with CY7C1021BV33  
• High speed  
Writing to the device is accomplished by taking Chip Enable  
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable  
(BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is  
written into the location specified on the address pins (A0  
through A15). If Byte High Enable (BHE) is LOW, then data  
from I/O pins (I/O9 through I/O16) is written into the location  
specified on the address pins (A0 through A15).  
— tAA = 8 ns (Commercial & Industrial)  
— tAA = 12 ns (Automotive)  
Reading from the device is accomplished by taking Chip  
Enable (CE) and Output Enable (OE) LOW while forcing the  
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,  
then data from the memory location specified by the address  
pins will appear on I/O1 to I/O8. If Byte High Enable (BHE) is  
LOW, then data from memory will appear on I/O9 to I/O16. See  
the truth table at the end of this data sheet for a complete  
description of Read and Write modes.  
• CMOS for optimum speed/power  
• Low active power: 345 mW (max.)  
• Automatic power-down when deselected  
• Independent control of upper and lower bits  
• Available in Pb-free and non Pb-free 44-pin 400-Mil SOJ  
44-pin TSOP II and 48-ball FBGA packages  
The input/output pins (I/O1 through I/O16) are placed in a  
high-impedance state when the device is deselected (CE  
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE  
are disabled (BHE, BLE HIGH), or during a Write operation  
(CE LOW, and WE LOW).  
The CY7C1021CV33 is available in 44-pin 400-Mil wide SOJ,  
44-pin TSOP II and 48-ball FBGA packages.  
Logic Block Diagram  
DATA IN DRIVERS  
A7  
A6  
A5  
64K x 16  
A4  
I/O1–I/O8  
RAM Array  
A3  
A2  
A1  
A0  
I/O9–I/O16  
COLUMN DECODER  
BHE  
WE  
CE  
OE  
BLE  
Note:  
1. For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.  
Cypress Semiconductor Corporation  
Document #: 38-05132 Rev. *G  
•
198 Champion Court  
•
San Jose, CA 95134-1709  
•
408-943-2600  
Revised November 6, 2006  
[+] Feedback  
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与CY7C1021CV33-12BAE相关器件

型号 品牌 获取价格 描述 数据表
CY7C1021CV33-12BAET CYPRESS

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 		Standard SRAM, 64KX16, 12ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48
CY7C1021CV33-12BAI ROCHESTER

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 		Standard SRAM, 64KX16, 12ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48
CY7C1021CV33-12BAI CYPRESS

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 		64K x 16 Static RAM
CY7C1021CV33-12BAIT CYPRESS

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 		Standard SRAM, 64KX16, 12ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48
CY7C1021CV33-12BAIT ROCHESTER

获取价格

 		Standard SRAM, 64KX16, 12ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48
CY7C1021CV33-12BAXI CYPRESS

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 		1-Mbit (64K x 16) Static RAM
CY7C1021CV33-12BAXI ROCHESTER

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 		64KX16 STANDARD SRAM, 12ns, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-48
CY7C1021CV33-12BAXIT CYPRESS

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 		Standard SRAM, 64KX16, 12ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-48
CY7C1021CV33-12VC ROCHESTER

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 		Standard SRAM, 64KX16, 12ns, CMOS, PDSO44, 0.400 INCH, SOJ-44
CY7C1021CV33-12VC CYPRESS

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 		64K x 16 Static RAM

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