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CY7C1021CV33-10

更新时间： 2024-11-10 22:09:35
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
12页 233K
描述
64K x 16 Static RAM

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中文翻译

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CY7C1021CV33-10 数据手册

 浏览型号CY7C1021CV33-10的Datasheet PDF文件第2页浏览型号CY7C1021CV33-10的Datasheet PDF文件第3页浏览型号CY7C1021CV33-10的Datasheet PDF文件第4页浏览型号CY7C1021CV33-10的Datasheet PDF文件第5页浏览型号CY7C1021CV33-10的Datasheet PDF文件第6页浏览型号CY7C1021CV33-10的Datasheet PDF文件第7页 
CY7C1021CV33  
64K x 16 Static RAM  
(BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is  
written into the location specified on the address pins (A0  
through A15). If Byte High Enable (BHE) is LOW, then data  
from I/O pins (I/O9 through I/O16) is written into the location  
specified on the address pins (A0 through A15).  
Features  
• Pin- and function-compatible with CY7C1021BV33  
• High speed  
— tAA = 8, 10, 12, and 15 ns  
Reading from the device is accomplished by taking Chip  
Enable (CE) and Output Enable (OE) LOW while forcing the  
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,  
then data from the memory location specified by the address  
pins will appear on I/O1 to I/O8. If Byte High Enable (BHE) is  
LOW, then data from memory will appear on I/O9 to I/O16. See  
the truth table at the end of this data sheet for a complete  
description of Read and Write modes.  
• CMOS for optimum speed/power  
• Low active power  
— 360 mW (max.)  
• Data retention at 2.0V  
• Automatic power-down when deselected  
• Independent control of upper and lower bits  
• Available in 44-pin TSOP II, 400-mil SOJ, 48-ball FBGA  
The input/output pins (I/O1 through I/O16) are placed in a  
high-impedance state when the device is deselected (CE  
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE  
are disabled (BHE, BLE HIGH), or during a Write operation  
(CE LOW, and WE LOW).  
Functional Description  
The CY7C1021CV33 is a high-performance CMOS static  
RAM organized as 65,536 words by 16 bits. This device has  
an automatic power-down feature that significantly reduces  
power consumption when deselected.  
The CY7C1021CV33 is available in standard 44-pin TSOP  
Type II 400-mil-wide SOJ packages, as well as a 48-ball  
FBGA.  
Writing to the device is accomplished by taking Chip Enable  
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable  
Logic Block Diagram  
Pin Configuration  
SOJ / TSOP II  
DATA IN DRIVERS  
Top View  
44  
1
A
4
A
5
43  
42  
41  
40  
39  
38  
A
A
2
3
4
5
6
3
6
A
A
2
7
A
A
A
7
6
5
4
OE  
A
1
BHE  
BLE  
I/O  
I/O  
I/O  
A
0
64K x 16  
CE  
A
A
A
A
I/O –I/O  
RAM Array  
512 X 2048  
I/O  
1
8
7
1
16  
37  
36  
35  
34  
33  
3
2
I/O  
I/O  
8
2
3
15  
14  
13  
I/O –I/O  
9
9
16  
10  
11  
12  
13  
I/O  
V
SS  
I/O  
1
0
4
CC  
V
SS  
A
V
V
CC  
32  
I/O  
I/O  
I/O  
5
6
7
8
12  
11  
31  
30  
29  
28  
I/O  
I/O  
I/O  
14  
15  
16  
I/O  
I/O  
10  
9
COLUMN DECODER  
WE 17  
NC  
18  
27  
26  
25  
A
A
8
15  
BHE  
19  
A
A
14  
13  
9
10  
11  
WE  
CE  
OE  
A
20  
21  
22  
A
A
A
12  
24  
23  
NC  
NC  
BLE  
Selection Guide  
CY7C1021CV33-8 CY7C1021CV33-10 CY7C1021CV33-12 CY7C1021CV33-15 Unit  
8
95  
5
10  
90  
5
12  
85  
5
15  
80  
5
ns  
Maximum Access Time  
mA  
mA  
Maximum Operating Current  
Maximum CMOS Standby Current  
Cypress Semiconductor Corporation  
•
3901 North First Street  
•
San Jose  
•
CA 95134  
•
408-943-2600  
Document #: 38-05132 Rev. *C  
Revised October 30, 2002  
1234567...12

中文翻译

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与CY7C1021CV33-10相关器件

型号 品牌 获取价格 描述 数据表
CY7C1021CV33-10BAC CYPRESS

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 		64K x 16 Static RAM
CY7C1021CV33-10BAC ROCHESTER

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 		Standard SRAM, 64KX16, 10ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48
CY7C1021CV33-10BACT CYPRESS

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 		暂无描述
CY7C1021CV33-10BACT ROCHESTER

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 		Standard SRAM, 64KX16, 10ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48
CY7C1021CV33-10BAI CYPRESS

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 		64K x 16 Static RAM
CY7C1021CV33-10BAI ROCHESTER

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 		Standard SRAM, 64KX16, 10ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48
CY7C1021CV33-10BAIT CYPRESS

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 		Standard SRAM, 64KX16, 10ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48
CY7C1021CV33-10BAXC ROCHESTER

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 		64KX16 STANDARD SRAM, 10ns, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-48
CY7C1021CV33-10BAXC CYPRESS

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 		Standard SRAM, 64KX16, 10ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-48
CY7C1021CV33-10BAXCT CYPRESS

获取价格

 		Standard SRAM, 64KX16, 10ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-48

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