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CY62158E

更新时间： 2024-11-18 09:42:51
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
16页 844K
描述
8-Mbit (1 M x 8) Static RAM Automatic power down when deselected

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CY62158E 数据手册

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CY62158E MoBL®  
8-Mbit (1 M × 8) Static RAM  
8-Mbit (1  
M × 8) Static RAM  
advanced circuit design to provide ultra low active current. This  
is ideal for providing More Battery Life™ (MoBL) in portable  
applications such as cellular telephones. The device also has an  
automatic power down feature that significantly reduces power  
consumption. Placing the device into standby mode reduces  
power consumption significantly when deselected (CE1 HIGH or  
CE2 LOW).  
Features  
■ Very high speed: 45 ns  
❐ Wide voltage range: 4.5 V–5.5 V  
■ Ultra low active power  
❐ Typical active current:1.8 mA at f = 1 MHz  
❐ Typical active current: 18 mA at f = fmax  
To write to the device, take Chip Enables (CE1 LOW and CE2  
HIGH) and Write Enable (WE) input LOW. Data on the eight I/O  
pins (I/O0 through I/O7) is then written into the location specified  
on the address pins (A0 through A19).  
■ Ultra low standby power  
❐ Typical standby current: 2 A  
❐ Maximum standby current: 8 A  
To read from the device, take Chip Enables (CE1 LOW and CE2  
HIGH) and OE LOW while forcing the WE HIGH. Under these  
conditions, the contents of the memory location specified by the  
address pins appear on the I/O pins.  
■ Easy memory expansion with CE1, CE2 and OE features  
■ Automatic power down when deselected  
■ CMOS for optimum speed and power  
The eight input and output pins (I/O0 through I/O7) are placed in  
a high impedance state when the device is deselected (CE1  
HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or a  
write operation is in progress (CE1 LOW and CE2 HIGH and WE  
LOW). See the Truth Table on page 11 for a complete description  
of read and write modes.  
■ Offered in Pb-free 44-pin TSOP II package  
Functional Description  
The CY62158E MoBL® is a high performance CMOS static RAM  
organized as 1024K words by 8 bits. This device features  
Logic Block Diagram  
A
I/O  
0
1
2
3
4
5
6
7
8
DATA IN DRIVERS  
0
A
A
A
A
A
A
A
A
I/O  
1
2
I/O  
I/O  
1024K x 8  
ARRAY  
3
4
I/O  
A
A
A
A
9
I/O  
10  
11  
12  
5
I/O  
6
CE  
CE  
1
2
I/O  
POWER  
DOWN  
7
COLUMN DECODER  
WE  
OE  
Cypress Semiconductor Corporation  
Document #: 38-05684 Rev. *H  
•
198 Champion Court  
•
San Jose, CA 95134-1709  
•
408-943-2600  
Revised June 10, 2011  
[+] Feedback  
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