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CY62158EV30LL-45BVXI PDF预览

CY62158EV30LL-45BVXI

更新时间: 2024-09-16 02:52:15
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 存储内存集成电路静态存储器
页数 文件大小 规格书
11页 997K
描述
8-Mbit (1024K x 8) Static RAM

CY62158EV30LL-45BVXI 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:BGA
包装说明:VFBGA, BGA48,6X8,30针数:48
Reach Compliance Code:compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41Factory Lead Time:1 week
风险等级:1.38Is Samacsys:N
最长访问时间:45 nsI/O 类型:COMMON
JESD-30 代码:R-PBGA-B48JESD-609代码:e1
长度:8 mm内存密度:8388608 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
湿度敏感等级:3功能数量:1
端子数量:48字数:1048576 words
字数代码:1000000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:1MX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:VFBGA
封装等效代码:BGA48,6X8,30封装形状:RECTANGULAR
封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):260电源:2.5/3.3 V
认证状态:Not Qualified座面最大高度:1 mm
最大待机电流:0.000005 A最小待机电流:1.5 V
子类别:SRAMs最大压摆率:0.025 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.2 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Silver/Copper (Sn/Ag/Cu)端子形式:BALL
端子节距:0.75 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:30宽度:6 mm
Base Number Matches:1

CY62158EV30LL-45BVXI 数据手册

 浏览型号CY62158EV30LL-45BVXI的Datasheet PDF文件第2页浏览型号CY62158EV30LL-45BVXI的Datasheet PDF文件第3页浏览型号CY62158EV30LL-45BVXI的Datasheet PDF文件第4页浏览型号CY62158EV30LL-45BVXI的Datasheet PDF文件第5页浏览型号CY62158EV30LL-45BVXI的Datasheet PDF文件第6页浏览型号CY62158EV30LL-45BVXI的Datasheet PDF文件第7页 
CY62158EV30 MoBL®  
8-Mbit (1024K x 8) Static RAM  
Features  
Functional Description [2]  
• Very high speed: 45 ns  
The CY62158EV30 is a high performance CMOS static RAM  
organized as 1024K words by 8 bits. This device features  
advanced circuit design to provide ultra low active current.  
This is ideal for providing More Battery Life™ (MoBL®) in  
portable applications such as cellular telephones. The device  
also has an automatic power down feature that significantly  
reduces power consumption. Placing the device into standby  
mode reduces power consumption significantly when  
deselected (CE1 HIGH or CE2 LOW). The eight input and  
output pins (IO0 through IO7) are placed in a high impedance  
state when the device is deselected (CE1 HIGH or CE2 LOW),  
the outputs are disabled (OE HIGH), or a write operation is in  
progress (CE1 LOW and CE2 HIGH and WE LOW).  
— Wide voltage range: 2.20V–3.60V  
• Pin compatible with CY62158DV30  
• Ultra low standby power  
— Typical standby current: 2 µA  
— Maximum standby current: 8 µA  
• Ultra low active power  
— Typical active current: 1.8 mA @ f = 1 MHz  
• Easy memory expansion with CE1, CE2, and OE features  
• Automatic power down when deselected  
• CMOS for optimum speed/power  
To write to the device, take Chip Enables (CE1 LOW and CE2  
HIGH) and Write Enable (WE) input LOW. Data on the eight  
IO pins (IO0 through IO7) is then written into the location  
specified on the address pins (A0 through A19).  
• Offered in Pb-free 48-ball VFBGA, 44-pin TSOP II and  
48-pin TSOP I packages[1]  
To read from the device, take Chip Enables (CE1 LOW and  
CE2 HIGH) and OE LOW while forcing the WE HIGH. Under  
these conditions, the contents of the memory location  
specified by the address pins appear on the IO pins. See the  
“Truth Table” on page 8 for a complete description of read and  
write modes.  
Logic Block Diagram  
A
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
8
IO  
0
DATA IN DRIVERS  
IO  
1
IO  
2
1024K x 8  
ARRAY  
IO  
3
IO  
IO  
IO  
IO  
4
5
6
7
A
A
A
A
9
10  
11  
12  
CE  
CE  
1
2
POWER  
DOWN  
COLUMN DECODER  
WE  
OE  
Notes  
1. For 48 pin TSOP I pin configuration and ordering information, please refer to CY62157EV30 Data sheet.  
2. For best practice recommendations, refer to the Cypress application note “System Design Guidelines” at http://www.cypress.com.  
Cypress Semiconductor Corporation  
Document #: 38-05578 Rev. *D  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised April 19, 2007  
[+] Feedback  

CY62158EV30LL-45BVXI 替代型号

型号 品牌 替代类型 描述 数据表
CY62158EV30LL-45BVXIT CYPRESS

类似代替

Standard SRAM, 1MX8, 45ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, LEAD FREE, VFBGA-48
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