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CY62158CV25LL-55BAI PDF预览

CY62158CV25LL-55BAI

更新时间: 2024-09-14 23:45:07
品牌 Logo 应用领域
其他 - ETC 静态存储器
页数 文件大小 规格书
12页 354K
描述
x8 SRAM

CY62158CV25LL-55BAI 数据手册

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CY62158CV25/30/33  
MoBL™  
1024K x 8 MoBL Static RAM  
in portable applications such as cellular telephones. The de-  
vice also has an automatic power-down feature that signifi-  
cantly reduces power consumption by 80% when addresses  
are not toggling. The device can be put into standby mode  
reducing power consumption by more than 99% when dese-  
lected (CE1 HIGH or CE2 LOW).  
Features  
• High Speed  
— 55 ns and 70 ns Availability  
Voltage range:  
— CY62158CV25: 2.2V–2.7V  
— CY62158CV30: 2.7V–3.3V  
— CY62158CV33: 3.0V–3.6V  
• Ultra low active power  
— Typical active current: 1 mA @ f = 1 MHz  
Writing to the device is accomplished by taking Chip Enable  
(CE1 LOW and CE2 HIGH) and Write Enable (WE) inputs  
LOW. Data on the eight I/O pins (I/O0 through I/O7) is then  
written into the location specified on the address pins (A0  
through A19).  
Reading from the device is accomplished by taking Chip En-  
able (CE1 LOW and CE2 HIGH) and Output Enable (OE) LOW  
while forcing Write Enable (WE) HIGH. Under these condi-  
tions, the contents of the memory location specified by the  
address pins will appear on the I/O pins.  
— Typical active current: 7 mA @ f = fmax (70 ns speed)  
• Low standby power  
• Easy memory expansion with CE1, CE2 and OE features  
• Automatic power-down when deselected  
• CMOS for optimum speed/power  
The eight input/output pins (I/O0 through I/O7) are placed in a  
high-impedance state when the device is deselected (CE1  
LOW and CE2 HIGH), the outputs are disabled (OE HIGH), or  
during a write operation (CE1 LOW and CE2 HIGH and WE  
LOW).  
Functional Description  
The CY62158CV25/30/33 are high-performance CMOS static  
RAMs organized as 1024K words by 8 bits. This device fea-  
tures advanced circuit design to provide ultra-low active cur-  
rent. This is ideal for providing More Battery Life™ (MoBL™)  
The CY62158CV25/30/33 are available in a 48-ball FBGA  
package.  
Logic Block Diagram  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
0
Data in Drivers  
A
0
1
2
3
4
5
6
7
8
1
2
3
4
5
A
A
A
A
A
A
1024K x 8  
ARRAY  
A
A
A
9
10  
11  
A
A
A
12  
6
7
POWER  
DOWN  
COLUMN  
DECODER  
CE  
CE  
1
2
I/O  
WE  
OE  
MoBL, MoBL2 and More Battery Life are trademarks of Cypress Semiconductor Corporation  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
Document #: 38-05019 Rev. *B  
Revised January 18, 2002  

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