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CY62146EV30LL-45BVXI PDF预览

CY62146EV30LL-45BVXI

更新时间: 2024-11-06 02:52:15
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
12页 526K
描述
4-Mbit (256K x 16) Static RAM

CY62146EV30LL-45BVXI 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:BGA
包装说明:VFBGA, BGA48,6X8,30针数:48
Reach Compliance Code:compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41Factory Lead Time:1 week
风险等级:1.05最长访问时间:45 ns
I/O 类型:COMMONJESD-30 代码:R-PBGA-B48
JESD-609代码:e1长度:8 mm
内存密度:4194304 bit内存集成电路类型:STANDARD SRAM
内存宽度:16湿度敏感等级:3
功能数量:1端子数量:48
字数:262144 words字数代码:256000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:256KX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:VFBGA封装等效代码:BGA48,6X8,30
封装形状:RECTANGULAR封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH
并行/串行:PARALLEL峰值回流温度(摄氏度):260
电源:2.5/3.3 V认证状态:Not Qualified
座面最大高度:1 mm最大待机电流:0.000007 A
最小待机电流:1.5 V子类别:SRAMs
最大压摆率:0.02 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.2 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Silver/Copper (Sn/Ag/Cu)
端子形式:BALL端子节距:0.75 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:30
宽度:6 mmBase Number Matches:1

CY62146EV30LL-45BVXI 数据手册

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CY62146EV30 MoBL®  
4-Mbit (256K x 16) Static RAM  
reduces power consumption by 80% when addresses are not  
toggling. The device can also be put into standby mode  
reducing power consumption by more than 99% when  
deselected (CE HIGH). The input and output pins (IO0 through  
IO15) are placed in a high impedance state when:  
Features  
• Very high speed: 45 ns  
• Wide voltage range: 2.20V–3.60V  
• Pin compatible with CY62146DV30  
• Ultra low standby power  
• Deselected (CE HIGH)  
• Outputs are disabled (OE HIGH)  
— Typical standby current: 1 µA  
• Both Byte High Enable and Byte Low Enable are disabled  
(BHE, BLE HIGH)  
— Maximum standby current: 7 µA  
• Ultra low active power  
• Write operation is active (CE LOW and WE LOW)  
— Typical active current: 2 mA @ f = 1 MHz  
• Easy memory expansion with CE, and OE features  
• Automatic power down when deselected  
• CMOS for optimum speed and power  
Write to the device by taking Chip Enable (CE) and Write  
Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW,  
then data from IO pins (IO0 through IO7), is written into the  
location specified on the address pins (A0 through A17). If Byte  
High Enable (BHE) is LOW, then data from IO pins (IO8  
through IO15) is written into the location specified on the  
address pins (A0 through A17).  
• Available in a Pb-free 48-ball VFBGA and 44-pin TSOP II  
packages  
Read from the device by taking Chip Enable (CE) and Output  
Enable (OE) LOW while forcing the Write Enable (WE) HIGH.  
If Byte Low Enable (BLE) is LOW, then data from the memory  
location specified by the address pins appear on IO0 to IO7. If  
Byte High Enable (BHE) is LOW, then data from memory  
appears on IO8 to IO15. See the “Truth Table” on page 9 for a  
complete description of read and write modes.  
Functional Description [1]  
The CY62146EV30 is a high performance CMOS static RAM  
organized as 256K words by 16 bits. This device features  
advanced circuit design to provide ultra low active current.  
This is ideal for providing More Battery Life™ (MoBL®) in  
portable applications such as cellular telephones. The device  
also has an automatic power down feature that significantly  
Product Portfolio  
Power Dissipation  
Speed  
(ns)  
Product  
VCC Range (V)  
Operating ICC (mA)  
Standby ISB2 (µA)  
f = 1 MHz  
f = fmax  
Min  
Typ [2]  
Max  
Typ [2]  
Max  
Typ [2]  
Max  
Typ [2]  
Max  
CY62146EV30LL  
2.2  
3.0  
3.6  
45 ns  
2
2.5  
15  
20  
1
7
Notes:  
1. For best practice recommendations, please refer to the Cypress application note System Design Guidelines on http://www.cypress.com.  
2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V = V , T = 25°C.  
CC  
CC(typ)  
A
Cypress Semiconductor Corporation  
Document #: 38-05567 Rev. *C  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised March 26, 2007  
[+] Feedback  

CY62146EV30LL-45BVXI 替代型号

型号 品牌 替代类型 描述 数据表
CY62147EV30LL-45BVXIT CYPRESS

完全替代

Standard SRAM, 256KX16, 45ns, CMOS, PBGA48, 6 X 8 MM, 1 MM PITCH, ROHS COMPLIANT, VFBGA-48
CY62147EV30LL-45BVXA CYPRESS

完全替代

4-Mbit (256K x 16) Static RAM
CY62147EV30LL-45BVI CYPRESS

完全替代

4-Mbit (256K x 16) Static RAM

与CY62146EV30LL-45BVXI相关器件

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CY62146EV30LL-45ZSXA CYPRESS

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CY62146EV30LL-45ZSXAT CYPRESS

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CY62146EV30LL-45ZSXI CYPRESS

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4-Mbit (256K x 16) Static RAM
CY62146EV30LL-45ZSXI INFINEON

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Asynchronous SRAM
CY62146EV30LL-45ZSXIT CYPRESS

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Asynchronous SRAM
CY62146G CYPRESS

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4-Mbit (256K words × 16 bit) Static RAM with
CY62146G30-45BVXI CYPRESS

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