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CY62146EV30LL-45ZSXIT PDF预览

CY62146EV30LL-45ZSXIT

更新时间： 2024-11-19 13:01:35
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
13页 444K
描述
Standard SRAM, 256KX16, 45ns, CMOS, PDSO44, LEAD FREE, TSOP2-44

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CY62146EV30LL-45ZSXIT 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active包装说明：TSOP2, TSOP44,.46,32
Reach Compliance Code：compliantECCN代码：3A991.B.2.A
HTS代码：8542.32.00.41Factory Lead Time：1 week
风险等级：1.12Is Samacsys：N
最长访问时间：45 nsI/O 类型：COMMON
JESD-30 代码：R-PDSO-G44JESD-609代码：e4
长度：18.415 mm内存密度：4194304 bit
内存集成电路类型：STANDARD SRAM内存宽度：16
湿度敏感等级：3功能数量：1
端子数量：44字数：262144 words
字数代码：256000工作模式：ASYNCHRONOUS
最高工作温度：85 °C最低工作温度：-40 °C
组织：256KX16输出特性：3-STATE
封装主体材料：PLASTIC/EPOXY封装代码：TSOP2
封装等效代码：TSOP44,.46,32封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE并行/串行：PARALLEL
峰值回流温度（摄氏度）：260电源：2.5/3.3 V
认证状态：Not Qualified座面最大高度：1.194 mm
最大待机电流：0.000007 A最小待机电流：1.5 V
子类别：SRAMs最大压摆率：0.02 mA
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2.2 V
标称供电电压 (Vsup)：3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.8 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30宽度：10.16 mm
Base Number Matches：1

CY62146EV30LL-45ZSXIT 数据手册

 浏览型号CY62146EV30LL-45ZSXIT的Datasheet PDF文件第2页浏览型号CY62146EV30LL-45ZSXIT的Datasheet PDF文件第3页浏览型号CY62146EV30LL-45ZSXIT的Datasheet PDF文件第4页浏览型号CY62146EV30LL-45ZSXIT的Datasheet PDF文件第5页浏览型号CY62146EV30LL-45ZSXIT的Datasheet PDF文件第6页浏览型号CY62146EV30LL-45ZSXIT的Datasheet PDF文件第7页 
CY62146EV30 MoBL®  
4-Mbit (256K x 16) Static RAM  
current. Ultra low active current is ideal for providing More  
Battery Life™ (MoBL®) in portable applications such as cellular  
telephones. The device also has an automatic power down  
feature that significantly reduces power consumption by 80  
percent when addresses are not toggling.The device can also be  
put into standby mode reducing power consumption by more  
than 99 percent when deselected (CE HIGH). The input and  
output pins (I/O0 through I/O15) are placed in a high impedance  
state when: the device is deselected (CE HIGH), outputs are  
disabled (OE HIGH), both Byte High Enable and Byte Low  
Enable are disabled (BHE, BLE HIGH), or a write operation is in  
progress (CE LOW and WE LOW).  
Features  
■ Very High Speed: 45 ns  
■ Temperature Ranges  
❐ Industrial: –40°C to +85°C  
❐ Automotive-A: –40°C to +85°C  
■ Wide Voltage Range: 2.20V–3.60V  
■ Pin Compatible with CY62146DV30  
■ Ultra Low Standby Power  
❐ Typical standby current: 1 μA  
❐ Maximum standby current: 7 μA  
To write to the device, take Chip Enable (CE ) and Write Enable  
(WE) input LOW. If Byte Low Enable (BLE) is LOW, then data  
from I/O pins (I/O0 through I/O7) is written into the location  
specified on the address pins (A0 through A17). If Byte High  
Enable (BHE) is LOW, then data from the I/O pins (I/O8 through  
I/O15) is written into the location specified on the address pins  
(A0 through A17).  
■ Ultra Low Active Power  
❐ Typical active current: 2 mA at f = 1 MHz  
■ Easy Memory Expansion with CE and OE Features  
■ Automatic Power Down when Deselected  
■ CMOS for Optimum Speed and Power  
To read from the device, take Chip Enable (CE) and Output  
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If  
Byte Low Enable (BLE) is LOW, then data from the memory  
location specified by the address pins appears on I/O0 to I/O7. If  
Byte High Enable (BHE) is LOW, then data from memory  
appears on I/O8 to I/O15. See the “Truth Table” on page 9 for a  
complete description of read and write modes.  
■ Available in a Pb-free 48-ball VFBGA and 44-pin TSOP II  
Packages  
Functional Description  
The CY62146EV30 is a high performance CMOS static RAM  
organized as 256K words by 16 bits. This device features an  
advanced circuit design designed to provide an ultra low active  
For best practice recommendations, refer to the Cypress  
application note AN1064, SRAM System Guidelines.  
Logic Block Diagram  
DATA IN DRIVERS  
A10  
A9  
A8  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
256K x 16  
RAM Array  
IO0–IO7  
IO8–IO15  
COLUMN DECODER  
BHE  
WE  
CE  
OE  
BLE  
Cypress Semiconductor Corporation  
Document Number: 38-05567 Rev. *D  
•
198 Champion Court  
•
San Jose, CA 95134-1709  
•
408-943-2600  
Revised March 23, 2009  
[+] Feedback  
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CY62146EV30LL-45ZSXIT 替代型号

型号 品牌 替代类型 描述 数据表
CY62147G30-45ZSXI CYPRESS

完全替代

 Standard SRAM, 256KX16, 45ns, CMOS, PDSO44, TSOP2-44
CY62147EV30LL-45ZSXA CYPRESS

完全替代

 4-Mbit (256K x 16) Static RAM
CY62146EV30LL-45ZSXA CYPRESS

完全替代

 4-Mbit (256K x 16) Static RAM

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CY62146G30-45ZSXI CYPRESS

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 		Standard SRAM, 256KX16, 45ns, CMOS, PDSO44, TSOP2-44
CY62146G30-45ZSXI INFINEON

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 		Asynchronous SRAM
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CY62146G-45ZSXAT INFINEON

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CY62146G-45ZSXI CYPRESS

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 		Standard SRAM, 256KX16, 45ns, CMOS, PDSO44, TSOP2-44

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