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CY62137FV30LL-45BVIT PDF预览

CY62137FV30LL-45BVIT

更新时间： 2024-11-20 19:55:47
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 静态存储器内存集成电路
页数 文件大小 规格书
12页 280K
描述
Standard SRAM, 128KX16, 45ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, VFBGA-48

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CY62137FV30LL-45BVIT 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete包装说明：6 X 8 MM, 1 MM HEIGHT, VFBGA-48
Reach Compliance Code：not_compliantECCN代码：3A991.B.2.A
HTS代码：8542.32.00.41风险等级：5.6
最长访问时间：45 nsI/O 类型：COMMON
JESD-30 代码：R-PBGA-B48长度：8 mm
内存密度：2097152 bit内存集成电路类型：STANDARD SRAM
内存宽度：16湿度敏感等级：3
功能数量：1端子数量：48
字数：131072 words字数代码：128000
工作模式：ASYNCHRONOUS最高工作温度：85 °C
最低工作温度：-40 °C组织：128KX16
输出特性：3-STATE封装主体材料：PLASTIC/EPOXY
封装代码：VFBGA封装等效代码：BGA48,6X8,30
封装形状：RECTANGULAR封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH
并行/串行：PARALLEL峰值回流温度（摄氏度）：NOT SPECIFIED
电源：2.5/3.3 V认证状态：Not Qualified
座面最大高度：1 mm最大待机电流：0.000004 A
最小待机电流：1.5 V子类别：SRAMs
最大压摆率：0.018 mA最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.2 V标称供电电压 (Vsup)：3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：BALL
端子节距：0.75 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：6 mm
Base Number Matches：1

CY62137FV30LL-45BVIT 数据手册

 浏览型号CY62137FV30LL-45BVIT的Datasheet PDF文件第2页浏览型号CY62137FV30LL-45BVIT的Datasheet PDF文件第3页浏览型号CY62137FV30LL-45BVIT的Datasheet PDF文件第4页浏览型号CY62137FV30LL-45BVIT的Datasheet PDF文件第5页浏览型号CY62137FV30LL-45BVIT的Datasheet PDF文件第6页浏览型号CY62137FV30LL-45BVIT的Datasheet PDF文件第7页 
CY62137FV30 MoBL®  
2-Mbit (128K x 16) Static RAM  
is ideal for providing More Battery Life™ (MoBL®) in portable  
applications such as cellular telephones. The device also has an  
automatic power down feature that significantly reduces power  
consumption by 90% when addresses are not toggling. Placing  
the device into standby mode reduces power consumption by  
more than 99% when deselected (CE HIGH or both BLE and  
BHE are HIGH). The input and output pins (IO0 through IO15) are  
placed in a high impedance state in the following conditions:  
Features  
■ Very high speed: 45 ns  
■ Temperature ranges  
❐ Industrial: –40°C to +85°C  
❐ Automotive-A: –40°C to +85°C  
❐ Automotive-E: –40°C to +125°C  
■ Wide voltage range: 2.20V–3.60V  
■ Deselected (CE HIGH)  
■ Pin compatible with CY62137CV/CV25/CV30/CV33,  
■ Outputs are disabled (OE HIGH  
CY62137V, and CY62137EV30  
■ Both Byte High Enable and Byte Low Enable are disabled  
■ Ultra low standby power  
(BHE, BLE HIGH)  
❐ Typical standby current: 1 μA  
❐ Maximum standby current: 5 μA (Industrial)  
■ Ultra low active power  
■ Write operation is active (CE LOW and WE LOW)  
Write to the device by taking Chip Enable (CE) and Write Enable  
(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data  
from IO pins (IO0 through IO7) is written into the location  
specified on the address pins (A0 through A16). If Byte High  
Enable (BHE) is LOW, then data from IO pins (IO8 through IO15  
is written into the location specified on the address pins (A0  
❐ Typical active current: 1.6 mA at f = 1 MHz (45 ns speed)  
■ Easy memory expansion with CE and OE features  
)
■ Automatic power down when deselected  
■ CMOS for optimum speed and power  
■ Byte power down feature  
through A16).  
Read from the device by taking Chip Enable (CE) and Output  
Enable (OE) LOW, while forcing the Write Enable (WE) HIGH. If  
Byte Low Enable (BLE) is LOW, then data from the memory  
location specified by the address pins appear on IO0 to IO7. If  
Byte High Enable (BHE) is LOW, then data from memory  
appears on IO8 to IO15. See the “Truth Table” on page 9 for a  
complete description of read and write modes.  
■ Available in Pb free 48-Ball VFBGA and 44-pin TSOP II  
package  
Functional Description  
The CY62137FV30 is a high performance CMOS static RAM  
organized as 128K words by 16 bits. This device features  
advanced circuit design to provide ultra low active current. This  
For best practice recommendations, refer to the Cypress  
application note AN1064, SRAM System Guidelines.  
Logic Block Diagram  
DATA IN DRIVERS  
A10  
A9  
A8  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
128K x 16  
RAM Array  
IO0–IO7  
IO8–IO15  
BHE  
WE  
CE  
COLUMN DECODER  
CE  
POWER DOWN  
CIRCUIT  
OE  
BLE  
BHE  
BLE  
Cypress Semiconductor Corporation  
Document Number: 001-07141 Rev. *F  
•
198 Champion Court  
•
San Jose, CA 95134-1709  
•
408-943-2600  
Revised January 2, 2008  
[+] Feedback  
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CY62137FV30LL-45BVXIT CYPRESS

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CY62137FV30LL-45ZSXI CYPRESS

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