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CY2CC810OC

更新时间: 2024-11-24 22:08:47
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟
页数 文件大小 规格书
7页 118K
描述
1:10 Clock Fanout Buffer

CY2CC810OC 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SSOP包装说明:5.30 MM, SSOP-20
针数:20Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.82
其他特性:ALSO OPERATES AT 3.3V SUPPLY系列:2CC
输入调节:SCHMITT TRIGGERJESD-30 代码:R-PDSO-G20
JESD-609代码:e0长度:7.2 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER最大I(ol):0.012 A
湿度敏感等级:1功能数量:1
反相输出次数:端子数量:20
实输出次数:10最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP20,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):220电源:2.5/3.3 V
Prop。Delay @ Nom-Sup:3.5 ns传播延迟(tpd):3.5 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.38 ns
座面最大高度:2 mm子类别:Clock Drivers
最大供电电压 (Vsup):2.625 V最小供电电压 (Vsup):2.375 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.3 mm

CY2CC810OC 数据手册

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COMLINK™ SERIES  
CY2CC810  
1:10 Clock Fanout Buffer  
Features  
Description  
Low-voltage operation  
VDD range from 2.5V to 3.3V  
1:10 fanout  
The Cypress series of network circuits are produced using  
advanced 0.35-micron CMOS technology, achieving the  
industries fastest logic and buffers.  
The Cypress CY2CC810 fanout buffer features one input and  
ten outputs. Designed for data communications clock  
management applications, the large fanout from a single input  
reduces loading on the input clock.  
Over voltage tolerant input hot swappable  
Drives either a 50-Ohm or 75-Ohm transmission line  
Low-input capacitance  
Low-output skew  
Low-propagation delay  
AVCMOS-type outputs dynamically adjust for variable  
impedance matching and eliminate the need for series  
damping resistors; they also reduce noise overall.  
Typical (tpd < 4 ns)  
High-speed operation > 500 MHz  
Industrial versions available  
Available packages include: SOIC, SSOP  
Block Diagram  
Pin Configuration  
Q1  
Q2  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
VDD  
IN  
1
2
3
4
5
6
7
8
Q10  
Q9  
GND  
Q3  
VDD  
Q1  
VDD  
Q2  
GND  
Q8  
Q4  
VDD  
Q7  
GND  
Q3  
Q5  
IN  
GND  
Q6  
INPUT  
VDD  
Q4  
Q6  
Q7  
Q8  
Q9  
Q10  
9
10  
Q5  
GND  
20 pin SOIC/SSOP  
GND  
OUTPUT  
(AVCMOS)  
Pin Description  
Pin Number  
Pin Name  
IN  
Description  
1
Input  
Ground  
LVCMOS  
Power  
2, 6, 10, 13, 17  
GND  
4, 8, 15, 20  
VDD  
Power Supply  
Output  
Power  
3, 5, 7, 9, 11, 12, 14, 16, 18, 19  
Q1... Q10  
AVCMOS  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
Document #: 38-07056 Rev. *C  
Revised December 14, 2002  

CY2CC810OC 替代型号

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1:10 Clock Fanout Buffer