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CDC536DL

更新时间： 2024-11-16 22:36:15
品牌 Logo 应用领域
德州仪器 - TI 时钟驱动器逻辑集成电路光电二极管输出元件信息通信管理
页数 文件大小 规格书
12页 171K
描述
3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS

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CDC536DL 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：SSOP
包装说明：SSOP, SSOP28,.4针数：28
Reach Compliance Code：not_compliantHTS代码：8542.39.00.01
风险等级：5.75Is Samacsys：N
系列：536输入调节：STANDARD
JESD-30 代码：R-PDSO-G28长度：9.525 mm
逻辑集成电路类型：PLL BASED CLOCK DRIVER最大I（ol）：0.032 A
功能数量：1反相输出次数：
端子数量：28实输出次数：6
最高工作温度：70 °C最低工作温度：
输出特性：3-STATE封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装等效代码：SSOP28,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED电源：3.3 V
认证状态：Not QualifiedSame Edge Skew-Max（tskwd）：0.5 ns
座面最大高度：2.79 mm子类别：Clock Drivers
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：BICMOS温度等级：COMMERCIAL
端子形式：GULL WING端子节距：0.635 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7.49 mm最小 fmax：100 MHz
Base Number Matches：1

CDC536DL 数据手册

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CDC536  
3.3-V PHASE-LOCK LOOP CLOCK DRIVER  
WITH 3-STATE OUTPUTS  
SCAS378F – APRIL 1994 – REVISED OCTOBER 1998  
DB OR DL PACKAGE  
(TOP VIEW)  
Low-Output Skew for Clock-Distribution  
and Clock-Generation Applications  
Operates at 3.3-V V  
CC  
AV  
AV  
CC  
1
2
3
4
5
6
7
8
9
28  
27  
26  
25  
24  
23  
22  
21  
20  
CC  
Distributes One Clock Input to Six Outputs  
AGND  
CLKIN  
SEL  
OE  
GND  
1Y1  
AGND  
FBIN  
TEST  
CLR  
One Select Input Configures Three Outputs  
to Operate at One-Half or Double the Input  
Frequency  
No External RC Network Required  
V
CC  
2Y1  
GND  
External Feedback Pin (FBIN) Is Used to  
Synchronize the Outputs to the Clock Input  
V
GND  
CC  
V
CC  
Application for Synchronous DRAM,  
High-Speed Microprocessor  
1Y2 10  
V
19 2Y2  
GND  
11  
12  
18  
17  
CC  
Negative-Edge-Triggered Clear for  
Half-Frequency Outputs  
GND  
V
CC  
16 2Y3  
1Y3 13  
14  
TTL-Compatible Inputs and Outputs  
15 GND  
V
CC  
Outputs Drive 50-Ω Parallel-Terminated  
Transmission Lines  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
Distributed V  
Switching Noise  
and Ground Pins Reduce  
CC  
Packaged in Plastic 28-Pin Shrink Small  
Outline Package  
description  
TheCDC536isahigh-performance, low-skew, low-jitterclockdriver. Itusesaphase-lockloop(PLL)toprecisely  
align, in both frequency and phase, the clock output signals to the clock input (CLKIN) signal. It is specifically  
designed for use with synchronous DRAMs and popular microprocessors operating at speeds from 50 MHz to  
100 MHz or down to 25 MHz on outputs configured as half-frequency outputs. The CDC536 operates at 3.3-V  
V
and is designed to drive a 50- transmission line.  
CC  
The feedback input (FBIN) is used to synchronize the output clocks in frequency and phase to the input clock  
(CLKIN). One of the six output clocks must be fed back to FBIN for the PLL to maintain synchronization between  
CLKIN and the outputs. The output used as the feedback pin is synchronized to the same frequency as CLKIN.  
The Y outputs can be configured to switch in phase and at the same frequency as CLKIN. The select (SEL)  
input configures three Y outputs to operate at one-half or double the CLKIN frequency depending on which pin  
is fed back to FBIN (see Tables 1 and 2). All output signal duty cycles are adjusted to 50% independent of the  
duty cycle at the input clock.  
Output-enable(OE)isprovidedforoutputcontrol. WhenOEishigh, theoutputsareinthehigh-impedancestate.  
When OE is low, the outputs are active. TEST is used for factory testing of the device and can be use to bypass  
the PLL. TEST should be strapped to GND for normal operation.  
Unlike many products containing PLLs, the CDC536 does not require external RC networks. The loop filter for  
the PLL is included on-chip, minimizing component count, board space, and cost.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...12

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