5秒后页面跳转
AS6UA5128-70BC PDF预览

AS6UA5128-70BC

更新时间: 2024-10-28 19:36:19
品牌 Logo 应用领域
ALSC 静态存储器内存集成电路
页数 文件大小 规格书
9页 118K
描述
Standard SRAM, 512KX8, 70ns, CMOS, PBGA36, CSP, FBGA-48/36

AS6UA5128-70BC 数据手册

 浏览型号AS6UA5128-70BC的Datasheet PDF文件第1页浏览型号AS6UA5128-70BC的Datasheet PDF文件第3页浏览型号AS6UA5128-70BC的Datasheet PDF文件第4页浏览型号AS6UA5128-70BC的Datasheet PDF文件第5页浏览型号AS6UA5128-70BC的Datasheet PDF文件第6页浏览型号AS6UA5128-70BC的Datasheet PDF文件第7页 
AS6UA5128  
®
Functional description  
The AS6UA5128 is a low-power CMOS 4,194,304-bit Static Random Access Memory (SRAM) device organized as 524,288  
words × 8 bits. It is designed for memory applications where slow data access, low power, and simple interfacing are desired.  
Equal address access and cycle times (tAA, tRC, tWC) of 55/70ns are ideal for low-power applications. Active high and low chip  
selects (CS) permit easy memory expansion with multiple-bank memory systems.  
When CS is high, the device enters standby mode: the AS6UA5128 is guaranteed not to exceed 72 µW power consumption at  
3.6V and 55 ns; 41 µW at 2.7V and 70 ns; or 28 µW at 2.3V and 100 ns. The device also returns data when VCC is reduced to  
1.5V for even lower power consumption.  
A write cycle is accomplished by asserting write enable (WE) and chip select (CS) low. Data on the input pins I/O1–I/O8 is  
written on the rising edge of WE (write cycle 1) or CS (write cycle 2). To avoid bus contention, external devices should drive  
I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).  
A read cycle is accomplished by asserting output enable (OE), chip select (CS), with write enable (WE) High. The chip drives  
I/O pins with the data word referenced by the input address. When either chip select or output enable is inactive, or write  
enable is active, output drivers stay in high-impedance mode.  
All chip inputs and outputs are CMOS-compatible, and operation is from a single 2.3V to 3.6V supply. The device is available in  
the JEDEC standard 36(48)-ball FBGA package.  
Absolute maximum ratings  
Parameter  
Voltage on VCC relative to VSS  
Voltage on any I/O pin relative to GND  
Power dissipation  
Device  
Symbol  
VtIN  
Min  
–0.5  
–0.5  
Max  
Unit  
V
VCC + 0.5  
VtI/O  
PD  
V
1.0  
+150  
+125  
20  
W
Storage temperature (plastic)  
Temperature with VCC applied  
DC output current (low)  
Tstg  
–65  
–55  
°C  
°C  
mA  
Tbias  
IOUT  
Note: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional  
operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to  
absolute maximum rating conditions for extended periods may affect reliability.  
Truth table  
CS  
H
L
WE  
X
OE  
X
Supply Current  
ISB  
I/O1–I/O8  
High Z  
Mode  
Standby (ISB)  
X
X
L
H
H
L
H
L
ICC  
ICC  
ICC  
High Z  
DOUT  
DIN  
Output disable (ICC  
)
L
Read (ICC  
)
L
X
Write (ICC)  
Key: X = Don’t care, L = Low, H = High.  
5/25/01; v.1.1  
Alliance Semiconductor  
P. 2 of 9  

与AS6UA5128-70BC相关器件

型号 品牌 获取价格 描述 数据表
AS6UA5128-70BI ALSC

获取价格

Standard SRAM, 512KX8, 70ns, CMOS, PBGA36, CSP, FBGA-48/36
AS6UA5128-70HFC ALSC

获取价格

SRAM
AS6UA5128-70HRC ALSC

获取价格

SRAM
AS6UA5128-70HRI ALSC

获取价格

SRAM
AS6UA5128-70STC ALSC

获取价格

SRAM
AS6UA5128-70STI ALSC

获取价格

SRAM
AS6UA5128-70TC ALSC

获取价格

SRAM
AS6UA5128-70TI ALSC

获取价格

SRAM
AS6UA5128-BC SEMICOA

获取价格

2.3V to 3.6V 512K】8 Intelliwatt low-power CMO
AS6UA5128-BI SEMICOA

获取价格

2.3V to 3.6V 512K】8 Intelliwatt low-power CMO