ADCLK846BCPZ

更新时间： 2024-11-24 06:36:19

品牌	Logo	应用领域
亚德诺 - ADI		时钟驱动器逻辑集成电路 PC
页数	文件大小	规格书
16页	518K
描述
1.8 V, 6 LVDS/12 CMOS Outputs Low Power Clock Fanout Buffer

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ADCLK846BCPZ 数据手册

1.8 V, 6 LVDS/12 CMOS Outputs

Low Power Clock Fanout Buffer

ADCLK846

FUNCTIONAL BLOCK DIAGRAM

FEATURES

Selectable LVDS/CMOS outputs

Up to 6 LVDS (1.2 GHz) or 12 CMOS (250 MHz) outputs

<16 mW per channel (100 MHz operation)

54 fs integrated jitter (12 kHz to 20 MHz)

100 fs additive broadband jitter

2.0 ns propagation delay (LVDS)

135 ps output rise/fall (LVDS)

LVDS/CMOS

ADCLK846

OUT0 (OUT0A)

OUT0 (OUT0B)

REF

OUT1 (OUT1A)

CLK

OUT1 (OUT1B)

CLK

CTRL_A

65 ps output-to-output skew (LVDS)

Sleep mode

LVDS/CMOS

OUT2 (OUT2A)

OUT2 (OUT2B)

Pin-programmable control

1.8 V power supply

OUT3 (OUT3A)

OUT3 (OUT3B)

APPLICATIONS

Low jitter clock distribution

Clock and data signal restoration

Level translation

Wireless communications

Wired communications

OUT4 (OUT4A)

OUT4 (OUT4B)

CTRL_B

SLEEP

OUT5 (OUT5A)

OUT5 (OUT5B)

Medical and industrial imaging

ATE and high performance instrumentation

Figure 1.

GENERAL DESCRIPTION

The ADCLK846 is a 1.2 GHz/250 MHz, LVDS/CMOS, fanout

buffer optimized for low jitter and low power operation. Possible

configurations range from 6 LVDS to 12 CMOS outputs,

including combinations of LVDS and CMOS outputs. Two

control lines are used to determine whether fixed blocks of

outputs are LVDS or CMOS outputs.

The clock input accepts various types of single-ended and

differential logic levels including LVPECL, LVDS, HSTL, CML,

and CMOS.

Table 8 provides interface options for each type of connection.

The SLEEP pin enables a sleep mode to power down the device.

This device is available in a 24-pin LFCSP package. It is specified

for operation over the standard industrial temperature range of

−40°C to +85°C.

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

12 3 4 5 6 7...16

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ADCLK846BCPZ 替代型号

型号	品牌	替代类型	描述	数据表
ADCLK846BCPZ-REEL7	ADI	完全替代	1.8 V, 6 LVDS/12 CMOS Outputs Low Power Clock Fanout Buffer

与ADCLK846BCPZ相关器件

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ADCLK846BCPZ-REEL7	ADI	获取价格	1.8 V, 6 LVDS/12 CMOS Outputs Low Power Clock Fanout Buffer
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ADCLK854BCPZ-REEL7	ADI	获取价格	1.8 V, 12-LVDS/24-CMOS Output, Low Power Clock Fanout Buffer
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