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ADCLK846BCPZ PDF预览

ADCLK846BCPZ

更新时间: 2024-02-13 05:32:47
品牌 Logo 应用领域
亚德诺 - ADI 时钟驱动器逻辑集成电路PC
页数 文件大小 规格书
16页 518K
描述
1.8 V, 6 LVDS/12 CMOS Outputs Low Power Clock Fanout Buffer

ADCLK846BCPZ 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFN
包装说明:HVQCCN,针数:24
Reach Compliance Code:unknown风险等级:5.75
Is Samacsys:N系列:6B
输入调节:DIFFERENTIAL MUXJESD-30 代码:S-XQCC-N24
JESD-609代码:e3长度:4 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER湿度敏感等级:NOT APPLICABLE
功能数量:1反相输出次数:
端子数量:24实输出次数:6
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):260
传播延迟(tpd):2.7 ns认证状态:COMMERCIAL
Same Edge Skew-Max(tskwd):0.39 ns座面最大高度:1 mm
最大供电电压 (Vsup):1.89 V最小供电电压 (Vsup):1.71 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:4 mm最小 fmax:1200 MHz
Base Number Matches:1

ADCLK846BCPZ 数据手册

 浏览型号ADCLK846BCPZ的Datasheet PDF文件第3页浏览型号ADCLK846BCPZ的Datasheet PDF文件第4页浏览型号ADCLK846BCPZ的Datasheet PDF文件第5页浏览型号ADCLK846BCPZ的Datasheet PDF文件第7页浏览型号ADCLK846BCPZ的Datasheet PDF文件第8页浏览型号ADCLK846BCPZ的Datasheet PDF文件第9页 
ADCLK846  
ABSOLUTE MAXIMUM RATINGS  
Table 5.  
DETERMINING JUNCTION TEMPERATURE  
To determine the junction temperature on the application PCB,  
use the following formula:  
Parameter  
Rating  
Supply Voltage  
VS to GND  
TJ = TCASE + (ΨJT × PD)  
2 V  
Inputs  
CLK and CLK  
where:  
−0.3 V to +2 V  
−0.3 V to +2 V  
TJ is the junction temperature (°C).  
CMOS Inputs  
Outputs  
Maximum Voltage  
Voltage Reference Voltage (VREF  
Operating Temperature Range  
Ambient  
TCASE is the case temperature (°C) measured by the customer at  
top center of the package.  
ΨJT is indicated in Table 6.  
PD is the power dissipation.  
−0.3 V to +2 V  
−0.3 V to +2 V  
)
Values of θJA are provided for package comparison and PCB  
design considerations. θJA can be used for a first-order  
approximation of TJ by the equation  
−40°C to +85°C  
150°C  
−65°C to +150°C  
Junction  
Storage Temperature Range  
TJ = TA + (θJA × PD)  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
where TA is the ambient temperature (°C).  
Values of θJB are provided for package comparison and PCB  
design considerations.  
ESD CAUTION  
THERMAL PERFORMANCE  
Table 6.  
Parameter  
Symbol  
Description  
Value1  
Unit  
Junction-to-Ambient Thermal Resistance  
θJA  
Still Air  
0.0 m/sec Airflow  
Moving Air  
Per JEDEC JESD51-2  
Per JEDEC JESD51-6  
57.0  
°C/W  
θJMA  
1.0 m/sec Airflow  
2.5 m/sec Airflow  
49.8  
44.7  
°C/W  
°C/W  
Junction-to-Board Thermal Resistance  
Moving Air  
θJB  
Per JEDEC JESD51-8  
1.0 m/sec Airflow  
Junction-to-Case Thermal Resistance  
Moving Air  
Die-to-Heat Sink  
Junction-to-Top-of-Package Characterization Parameter  
Still Air  
35.2  
2.0  
°C/W  
°C/W  
°C/W  
θJC  
Per MIL-STD 883, Method 1012.1  
Per JEDEC JESD51-2  
ΨJT  
0 m/sec Airflow  
1.0  
1 Results are from simulations. The PCB is a JEDEC multilayer type. Thermal performance for actual applications requires careful inspection of the conditions in the  
application to determine if they are similar to those assumed in these calculations.  
Rev. A | Page 6 of 16  
 
 
 
 

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