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ADCLK925BCPZ-R7 PDF预览

ADCLK925BCPZ-R7

更新时间: 2024-11-24 19:58:55
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亚德诺 - ADI 放大器
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16页 751K
描述
Ultrafast SiGe ECL Clock/Data Buffers

ADCLK925BCPZ-R7 数据手册

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Ultrafast SiGe  
ECL Clock/Data Buffers  
Data Sheet  
ADCLK905/ADCLK907/ADCLK925  
FEATURES  
TYPICAL APPLICATION CIRCUITS  
V
REF  
V
CC  
95 ps propagation delay  
V
T
7.5 GHz toggle rate  
60 ps typical output rise/fall  
60 fs random jitter (RJ)  
On-chip terminations at both input pins  
Extended industrial temperature range: −40°C to +125°C  
D
D
Q
Q
2.5 V to 3.3 V power supply (VCC − VEE  
)
V
EE  
APPLICATIONS  
Figure 1. ADCLK905 ECL 1:1 Clock/Data Buffer  
Clock and data signal restoration and level shifting  
Automated test equipment (ATE)  
High speed instrumentation  
High speed line receivers  
V
1
REF  
V 1  
T
V
CC  
Threshold detection  
Converter clocking  
D1  
D1  
Q1  
Q1  
V
V
EE  
GENERAL DESCRIPTION  
The ADCLK905 (one input, one output), ADCLK907 (dual one  
input, one output), and ADCLK925 (one input, two outputs) are  
ultrafast clock/data buffers fabricated on the Analog Devices, Inc.,  
proprietary XFCB3 silicon germanium (SiGe) bipolar process.  
EE  
D2  
D2  
Q2  
Q2  
V
CC  
V 2  
T
The ADCLK905/ADCLK907/ADCLK925 feature full-swing  
emitter coupled logic (ECL) output drivers. For PECL (positive  
ECL) operation, bias VCC to the positive supply and VEE to ground.  
For NECL (negative ECL) operation, bias VCC to ground and  
V
2
REF  
Figure 2. ADCLK907 ECL Dual 1:1 Clock/Data Buffer  
V
EE to the negative supply.  
V
REF  
V
CC  
V
T
Q1  
Q1  
The buffers offer 95 ps propagation delay, 7.5 GHz toggle rate,  
10 Gbps data rate, and 60 fs random jitter (RJ).  
D
D
The inputs have center tapped, 100 Ω, on-chip termination  
resistors. A VREF pin is available for biasing ac-coupled inputs.  
Q2  
Q2  
The ECL output stages are designed to directly drive 800 mV  
each side into 50 Ω terminated to VCC − 2 V for a total  
differential output swing of 1.6 V.  
V
EE  
Figure 3. ADCLK925 ECL 1:2 Clock/Data Fanout Buffer  
The ADCLK905/ADCLK907/ADCLK925 are available in  
16-lead LFCSP packages.  
Rev. B  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 ©2007–2017 Analog Devices, Inc. All rights reserved.  
Technical Support  
www.analog.com  
 
 
 
 

ADCLK925BCPZ-R7 替代型号

型号 品牌 替代类型 描述 数据表
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完全替代

Ultrafast SiGe ECL Clock/Data Buffers
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