5秒后页面跳转
ADCLK948 PDF预览

ADCLK948

更新时间: 2022-12-17 09:00:46
品牌 Logo 应用领域
亚德诺 - ADI 时钟
页数 文件大小 规格书
12页 366K
描述
Two Selectable Inputs, 8 LVPECL Outputs, SiGe Clock Fanout Buffer

ADCLK948 数据手册

 浏览型号ADCLK948的Datasheet PDF文件第2页浏览型号ADCLK948的Datasheet PDF文件第3页浏览型号ADCLK948的Datasheet PDF文件第4页浏览型号ADCLK948的Datasheet PDF文件第5页浏览型号ADCLK948的Datasheet PDF文件第6页浏览型号ADCLK948的Datasheet PDF文件第7页 
Two Selectable Inputs, 8 LVPECL Outputs,  
SiGe Clock Fanout Buffer  
ADCLK948  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
LVPECL  
2 selectable differential inputs  
4.8 GHz operating frequency  
75 fs rms broadband random jitter  
On-chip input terminations  
3.3 V power supply  
ADCLK948  
Q0  
Q0  
Q1  
Q1  
APPLICATIONS  
Q2  
Q2  
Low jitter clock distribution  
Clock and data signal restoration  
Level translation  
Q3  
V
0
REFERENCE  
Wireless communications  
REF  
Q3  
Wired communications  
Medical and industrial imaging  
ATE and high performance instrumentation  
Q4  
Q4  
V 0  
T
CLK0  
CLK0  
GENERAL DESCRIPTION  
Q5  
Q5  
The ADCLK948 is an ultrafast clock fanout buffer fabricated  
on the Analog Devices, Inc., proprietary XFCB3 silicon german-  
ium (SiGe) bipolar process. This device is designed for high  
speed applications requiring low jitter.  
V 1  
T
CLK1  
CLK1  
Q6  
Q6  
The device has two selectable differential inputs via the IN_SEL  
control pin. Both inputs are equipped with center tapped,  
differential, 100 Ω on-chip termination resistors. The inputs  
accept dc-coupled LVPECL, CML, 3.3 V CMOS (single-ended),  
and ac-coupled 1.8 V CMOS, LVDS, and LVPECL inputs. A  
Q7  
Q7  
IN_SEL  
V
1
REFERENCE  
REF  
V
REFx pin is available for biasing ac-coupled inputs.  
Figure 1.  
The ADCLK948 features eight full-swing emitter coupled logic  
(ECL) output drivers. For LVPECL (positive ECL) operation,  
bias VCC to the positive supply and VEE to ground. For ECL  
operation, bias VCC to ground and VEE to the negative supply.  
The output stages are designed to directly drive 800 mV each  
side into 50 Ω terminated to VCC − 2 V for a total differential  
output swing of 1.6 V.  
The ADCLK948 is available in a 32-lead LFCSP and specified  
for operation over the standard industrial temperature range of  
−40°C to +85°C.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2009 Analog Devices, Inc. All rights reserved.  
 
 

与ADCLK948相关器件

型号 品牌 描述 获取价格 数据表
ADCLK948/PCBZ ADI Two Selectable Inputs, 8 LVPECL Outputs, SiGe Clock Fanout Buffer

获取价格

ADCLK948BCPZ ADI Two Selectable Inputs, 8 LVPECL Outputs, SiGe Clock Fanout Buffer

获取价格

ADCLK948BCPZ-REEL7 ADI Two Selectable Inputs, 8 LVPECL Outputs, SiGe Clock Fanout Buffer

获取价格

ADCLK950 ADI Two Selectable Inputs, 10 LVPECL Outputs, SiGe Clock Fanout Buffer

获取价格

ADCLK950/PCBZ ADI Two Selectable Inputs, 10 LVPECL Outputs, SiGe Clock Fanout Buffer

获取价格

ADCLK950BCPZ ADI Two Selectable Inputs, 10 LVPECL Outputs, SiGe Clock Fanout Buffer

获取价格