Datasheet > ADC12DL080CIVS

ADC12DL080CIVS

更新时间： 2024-09-10 03:25:35

品牌	Logo	应用领域
美国国家半导体 - NSC		转换器
页数	文件大小	规格书
24页	1039K
描述
Dual 12-Bit, 80 MSPS, A/D Converter for IF Sampling

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ADC12DL080CIVS 数据手册

February 2006

ADC12DL080

Dual 12-Bit, 80 MSPS, A/D Converter for IF Sampling

General Description

Features

n Single +3.3V supply operation

n Internal sample-and-hold

n Internal or External reference

n Outputs 2.4V to 3.6V compatible

n Power down mode

The ADC12DL080 is a dual, low power monolithic CMOS

analog-to-digital converter capable of converting analog in-

put signals into 12-bit digital words at 80 Megasamples per

second (MSPS). This converter uses a differential, pipeline

architecture with digital error correction and an on-chip

sample-and-hold circuit to minimize power consumption

while providing excellent dynamic performance and a 600

MHz Full Power Bandwidth. Operating on a single +3.3V

power supply, the ADC12DL080 achieves 11.0 effective bits

at Nyquist and consumes just 447mW at 80 MSPS. The

Power Down feature reduces power consumption to 50 mW.

n Duty Cycle Stabilizer

n Pin compatible with ADC12DL040, ADC12DL065,

ADC12DL066

Key Specifications

n Resolution

12 Bits

The differential inputs provide a full scale differential input

swing equal to 2 times V_REFwith the possibility of a single-

ended input. Full use of the differential input is recom-

mended for optimum performance. Duty cycle stabilization

and output data format are selectable. The output data can

be set for offset binary or two’s complement.

n Max Conversion Rate

n DNL

80 MSPS

0.4 LSB (typ)

69 dB (typ)

67 dB (typ)

82 dB (typ)

81 dB (typ)

n SNR (f_IN=40MHz)

n SNR (f_IN=200MHz)

n SFDR (f_IN=40MHz)

n SFDR (f_IN=200MHz)

n Power Consumption

— Operating

To ease interfacing to lower voltage systems, the digital

output driver power pins of the ADC12DL080 can be con-

nected to a separate supply voltage in the range of 2.4V to

the analog supply voltage. This device is available in the

64-lead TQFP package and will operate over the industrial

temperature range of −40˚C to +85˚C. An evaluation board is

available to ease the evaluation process.

447 mW (typ)

50 mW (typ)

— Power Down Mode

Applications

n Instrumentation

n Communications Receivers

n Sonar/Radar

n xDSL, Cable Modems

Connection Diagram

20169401

TRI-STATE^®is a registered trademark of National Semiconductor Corporation.

DS201694

www.national.com

12 3 4 5 6 7...24

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与ADC12DL080CIVS相关器件

型号	品牌	获取价格	描述	数据表
ADC12DL080CIVS/NOPB	TI	获取价格	双通道、12 位、80MSPS、600MHz 输入带宽模数转换器 (ADC) \| PAG
ADC12DL080EVAL	NSC	获取价格	Dual 12-Bit, 80 MSPS, A/D Converter for IF Sampling
ADC12DL1500	TI	获取价格	12 位双通道 1.5GSPS 或单通道 3GSPS 模数转换器（LVDS 接口）
ADC12DL1500ACF	TI	获取价格	12 位双通道 1.5GSPS 或单通道 3GSPS 模数转换器（LVDS 接口） \| A
ADC12DL2500	TI	获取价格	12 位双通道 2.5GSPS 或单通道 5GSPS 模数转换器（LVDS 接口）
ADC12DL2500ACF	TI	获取价格	12 位双通道 2.5GSPS 或单通道 5GSPS 模数转换器（LVDS 接口） \| A
ADC12DL3200	TI	获取价格	12 位双通道 3.2GSPS 或单通道 6.4GSPS 射频采样数模转换器（LVDS 接
ADC12DL3200ACF	TI	获取价格	12 位双通道 3.2GSPS 或单通道 6.4GSPS 射频采样数模转换器（LVDS 接
ADC12DL3200ALJ	TI	获取价格	12 位双通道 3.2GSPS 或单通道 6.4GSPS 射频采样数模转换器（LVDS 接
ADC12DL500	TI	获取价格	12 位双通道 500MSPS 或单通道 1GSPS 模数转换器（LVDS 接口）

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