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ADC12DS080CISQE/NOPB PDF预览

ADC12DS080CISQE/NOPB

更新时间: 2024-09-11 11:11:07
品牌 Logo 应用领域
德州仪器 - TI 转换器模数转换器
页数 文件大小 规格书
33页 704K
描述
双通道、12 位、80MSPS 模数转换器 (ADC) | NKA | 60 | -40 to 85

ADC12DS080CISQE/NOPB 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFN
包装说明:HVQCCN, LCC60,.35SQ,20针数:60
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.44
最大模拟输入电压:1.6 V最小模拟输入电压:-2 V
最长转换时间:0.152 µs转换器类型:ADC, PROPRIETARY METHOD
JESD-30 代码:S-PQCC-N60JESD-609代码:e3
长度:9 mm最大线性误差 (EL):0.0366%
湿度敏感等级:3模拟输入通道数量:2
位数:12功能数量:1
端子数量:60最高工作温度:85 °C
最低工作温度:-40 °C输出位码:OFFSET BINARY, 2'S COMPLEMENT BINARY
输出格式:SERIAL封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装等效代码:LCC60,.35SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260电源:3/3.3 V
认证状态:Not Qualified采样速率:80 MHz
采样并保持/跟踪并保持:SAMPLE座面最大高度:0.8 mm
子类别:Analog to Digital Converters最大压摆率:230 mA
标称供电电压:3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:9 mm
Base Number Matches:1

ADC12DS080CISQE/NOPB 数据手册

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ADC12DS080  
www.ti.com  
SNAS443A MARCH 2008REVISED MARCH 2013  
ADC12DS080 Dual 12-Bit, 80 MSPS A/D Converter with Serial LVDS Outputs  
Check for Samples: ADC12DS080  
1
FEATURES  
DESCRIPTION  
The ADC12DS080 is a high-performance CMOS  
analog-to-digital converter capable of converting two  
analog input signals into 12-bit digital words at rates  
up to 80 Mega Samples Per Second (MSPS). The  
digital outputs are serialized and provided on  
differential LVDS signal pairs. This converter uses a  
differential, pipelined architecture with digital error  
correction and an on-chip sample-and-hold circuit to  
minimize power consumption and the external  
component count, while providing excellent dynamic  
performance. The ADC12DS080 may be operated  
from a single +3.0V or 3.3V power supply. A power-  
down feature reduces the power consumption to very  
low levels while still allowing fast wake-up time to full  
operation. The differential inputs accept a 2V full  
scale differential input swing. A stable 1.2V internal  
voltage reference is provided, or the ADC12DS080  
can be operated with an external 1.2V reference. The  
2
Clock Duty Cycle Stabilizer  
Single +3.0 or 3.3V Supply Operation  
Serial LVDS Outputs  
Serial Control Interface  
Overrange Outputs  
60-pin WQFN Package, (9x9x0.8mm, 0.5mm  
pin-pitch)  
KEY SPECIFICATIONS  
Resolution: 12 Bits  
Conversion Rate: 80 MSPS  
SNR (fIN = 170 MHz): 70 dBFS (typ)  
SFDR (fIN = 170 MHz): 81 dBFS (typ)  
Full Power Bandwidth: 1 GHz (typ)  
Power Consumption: 800 mW (typ)  
selectable  
duty  
cycle  
stabilizer  
maintains  
performance over a wide range of clock duty cycles.  
A serial interface allows access to the internal  
registers for full control of the ADC12DS080's  
functionality. The ADC12DS080 is available in a 60-  
lead WQFN package and operates over the industrial  
temperature range of 40°C to +85°C  
APPLICATIONS  
High IF Sampling Receivers  
Wireless Base Station Receivers  
Test and Measurement Equipment  
Communications Instrumentation  
Portable Instrumentation  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2008–2013, Texas Instruments Incorporated  

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