Datasheet > ADC12DS105

ADC12DS105

更新时间： 2024-11-26 11:13:39

品牌	Logo	应用领域
德州仪器 - TI		转换器模数转换器
页数	文件大小	规格书
35页	692K
描述
双通道、12 位、105MSPS 模数转换器 (ADC)

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ADC12DS105 数据手册

ADC12DS105

www.ti.com

SNAS382E –SEPTEMBER 2006–REVISED APRIL 2013

ADC12DS105 Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs

Check for Samples: ADC12DS105

FEATURES

DESCRIPTION

The ADC12DS105 is a high-performance CMOS

analog-to-digital converter capable of converting two

analog input signals into 12-bit digital words at rates

up to 105 Mega Samples Per Second (MSPS). The

digital outputs are serialized and provided on

differential LVDS signal pairs. This converter uses a

differential, pipelined architecture with digital error

correction and an on-chip sample-and-hold circuit to

minimize power consumption and the external

component count, while providing excellent dynamic

performance. The ADC12DS105 may be operated

from a single +3.0V or 3.3V power supply. A power-

down feature reduces the power consumption to very

low levels while still allowing fast wake-up time to full

operation. The differential inputs accept a 2V full

scale differential input swing. A stable 1.2V internal

voltage reference is provided, or the ADC12DS105

can be operated with an external 1.2V reference. The

•

Clock Duty Cycle Stabilizer

Single +3.0 or 3.3V Supply Operation

Serial LVDS Outputs

•

Serial Control Interface

Overrange Outputs

60-pin WQFN Package, (9x9x0.8mm, 0.5mm

pin-pitch)

APPLICATIONS

•

High IF Sampling Receivers

Wireless Base Station Receivers

Test and Measurement Equipment

Communications Instrumentation

Portable Instrumentation

selectable

duty

cycle

stabilizer

maintains

KEY SPECIFICATIONS

performance over a wide range of clock duty cycles.

A serial interface allows access to the internal

registers for full control of the ADC12DS105's

functionality. The ADC12DS105 is available in a 60-

lead WQFN package and operates over the industrial

temperature range of −40°C to +85°C

•

Resolution: 12 Bits

Conversion Rate: 105 MSPS

SNR (f_IN= 240 MHz): 68.5 dBFS (typ)

SFDR (f_IN= 240 MHz): 83 dBFS (typ)

Full Power Bandwidth: 1 GHz (typ)

Power Consumption: 1 W (typ)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...35

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与ADC12DS105相关器件

型号	品牌	获取价格	描述	数据表
ADC12DS105_08	NSC	获取价格	Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs
ADC12DS105CISQ	NSC	获取价格	Dual 12-Bit, 65/80/95/105 MSPS A/D Converter with Serial LVDS outputs
ADC12DS105CISQ/NOPB	TI	获取价格	双通道、12 位、105MSPS 模数转换器 (ADC) \| NKA \| 60 \| -40
ADC12DS105CISQE/NOPB	TI	获取价格	双通道、12 位、105MSPS 模数转换器 (ADC) \| NKA \| 60 \| -40
ADC12DS105LFEB	NSC	获取价格	Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs
ADC12EU050	NSC	获取价格	Ultra-Low Power, Octal, 12-bit, 40-50 MSPS Analog-to-Digital Converter
ADC12EU050_0811	NSC	获取价格	Ultra-Low Power, Octal, 12-bit, 40-50 MSPS Sigma-Delta Analog-to-Digital Converter
ADC12EU050_09	NSC	获取价格	Ultra-Low Power, Octal, 12-bit, 40-50 MSPS Sigma-Delta Analog-to-Digital Converter
ADC12EU050CILQ	NSC	获取价格	Ultra-Low Power, Octal, 12-bit, 40-50 MSPS Analog-to-Digital Converter
ADC12EU050CIPLQ	NSC	获取价格	Ultra-Low Power, Octal, 12-bit, 40-50 MSPS Sigma-Delta Analog-to-Digital Converter

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