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74VHCT273 PDF预览

74VHCT273

更新时间: 2024-11-25 22:56:27
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 触发器
页数 文件大小 规格书
9页 72K
描述
OCTAL D-TYPE FLIP FLOP WITH CLEAR

74VHCT273 数据手册

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74VHCT273A  
OCTAL D-TYPE FLIP FLOP WITH CLEAR  
HIGH SPEED:  
MAX =170MHz(TYP.) at VCC =5V  
f
LOW POWER DISSIPATION:  
ICC =4 µA (MAX.) at TA =25 oC  
COMPATIBLEWITH TTL OUTPUTS:  
VIH =2V (MIN), VIL = 0.8V(MAX)  
POWERDOWN PROTECTIONON INPUTS&  
OUTPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
|IOH| = IOL = 8 mA (MIN)  
BALANCEDPROPAGATIONDELAYS:  
tPLH tPHL  
M
T
(Micro Package)  
(TSSOPPackage)  
ORDER CODES :  
74VHCT273AM  
74VHCT273AT  
technology.  
Information signals applied to D inputs are  
transfered to the Q outputs on the positive going  
edge of the clock pulse.  
When the CLEAR input is held low, the Q outputs  
are held low independentlyof the other inputs .  
Power down protection is provided on all inputs  
and outputs and 0 to 7V can be accepted on  
inputs with no regard to the supply voltage. This  
device can be used to interface 5V to 3V.  
OPERATING VOLTAGERANGE:  
VCC (OPR)= 4.5V to 5.5V  
PIN AND FUNCTION COMPATIBLEWITH  
74 SERIES273  
IMPROVED LATCH-UP IMMUNITY  
LOWNOISE:VOLP = 0.9V(Max.)  
DESCRIPTION  
The 74VHCT273A is an advanced high-speed  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
CMOS OCTAL  
CLEAR fabricated with sub-micron silicon gate  
and double-layer metal wiring  
C2MOS  
D-TYPE FLIP FLOP WITH  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
1/9  
November 1999  

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