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74VHCT27AMTR PDF预览

74VHCT27AMTR

更新时间: 2024-11-25 22:56:27
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 栅极触发器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
7页 53K
描述
TRIPLE 3-INPUT NOR GATE

74VHCT27AMTR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP-14针数:14
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.84Is Samacsys:N
系列:AHCT/VHCTJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:8.65 mm
负载电容(CL):50 pF逻辑集成电路类型:NOR GATE
最大I(ol):0.008 A湿度敏感等级:1
功能数量:3输入次数:3
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:5 VProp。Delay @ Nom-Sup:9 ns
传播延迟(tpd):9 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.75 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3.9 mmBase Number Matches:1

74VHCT27AMTR 数据手册

 浏览型号74VHCT27AMTR的Datasheet PDF文件第2页浏览型号74VHCT27AMTR的Datasheet PDF文件第3页浏览型号74VHCT27AMTR的Datasheet PDF文件第4页浏览型号74VHCT27AMTR的Datasheet PDF文件第5页浏览型号74VHCT27AMTR的Datasheet PDF文件第6页浏览型号74VHCT27AMTR的Datasheet PDF文件第7页 
74VHCT27A  
TRIPLE 3-INPUT NOR GATE  
PRELIMINARY DATA  
HIGH SPEED:tPD =5 ns (TYP.) atVCC =5V  
LOW POWER DISSIPATION:  
ICC =2 µA (MAX.) at TA =25 oC  
COMPATIBLEWITH TTL OUTPUTS:  
VIH =2V (MIN), VIL = 0.8V(MAX)  
POWERDOWN PROTECTIONON INPUTS&  
OUTPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
|IOH| = IOL = 8 mA (MIN)  
BALANCEDPROPAGATIONDELAYS:  
tPLH tPHL  
SOP  
TSSOP  
ORDER CODES  
PACKAGE  
SOP  
TUBE  
T & R  
74VHCT27AM  
74VHCT27AMTR  
74VHCT27ATTR  
TSSOP  
OPERATING VOLTAGERANGE:  
VCC (OPR)= 4.5V to 5.5V  
PIN AND FUNCTION COMPATIBLEWITH  
74 SERIES27  
including buffer output, which provides high noise  
immunity and stable output.  
Power down protection is provided on all inputs  
and outputs and 0 to 7V can be accepted on  
inputs with no regard to the supply voltage. This  
device can be used to interface 5V to 3V.  
IMPROVED LATCH-UP IMMUNITY  
DESCRIPTION  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
The 74VHCT27A is an advanced high-speed  
CMOS TRIPLE 3-INPUT NOR GATE fabricated  
with sub-micron silicon gate and double-layer  
metal wiring C2MOS technology.  
The internal circuit is composed of 3 stages  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
1/7  
February 2000  

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