Datasheet > 74VHC595PW-Q100J

74VHC595PW-Q100J

更新时间： 2024-11-18 13:23:03

品牌	Logo	应用领域
恩智浦 - NXP		PC 光电二极管逻辑集成电路触发器
页数	文件大小	规格书
21页	206K
描述
74VHC(T)595-Q100 - 8-bit serial-in/serial-out or parallel-out shift register with output latches TSSOP 16-Pin

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74VHC595PW-Q100J 技术参数

生命周期：	Transferred	零件包装代码：	TSSOP
包装说明：	4.40 MM, PLASTIC, MO-153, SOT403-1, TSSOP-16	针数：	16
Reach Compliance Code：	unknown	风险等级：	5.77
Base Number Matches：	1

74VHC595PW-Q100J 数据手册

74VHC595-Q100;

74VHCT595-Q100

8-bit serial-in/serial-out or parallel-out shift register with

output latches

Rev. 1 — 15 November 2013

Product data sheet

1. General description

The 74VHC595-Q100; 74VHCT595-Q100 are high-speed Si-gate CMOS devices and are

pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with

JEDEC standard No. 7A.

The 74VHC595-Q100; 74VHCT595-Q100 are 8-stage serial shift registers with a storage

Data is shifted on the positive-going transitions of the shift register clock input (SHCP).

The data in each register is transferred to the storage register on a positive-going

transition of the storage register clock input (STCP). If both clocks are connected together,

the shift register is always one clock pulse ahead of the storage register.

The shift register has a serial input (DS) and a serial standard output (Q7S) for cascading.

It is also provided with asynchronous reset (active LOW) for all 8 shift register stages. The

storage register has 8 parallel 3-state bus driver outputs. Data in the storage register

appears at the output whenever the output enable input (OE) is LOW.

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

 Automotive product qualification in accordance with AEC-Q100 (Grade 1)

 Specified from 40 C to +85 C and from 40 C to +125 C

 Balanced propagation delays

 All inputs have Schmitt-trigger action

 Inputs accept voltages higher than V_CC

 Input levels:

 The 74VHC595-Q100 operates with CMOS input level

 The 74VHCT595-Q100 operates with TTL input level

 ESD protection:

 MIL-STD-883, method 3015 exceeds 2000 V

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 )

 Multiple package options

12 3 4 5 6 7...21

中文翻译

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与74VHC595PW-Q100J相关器件

型号	品牌	获取价格	描述	数据表
74VHC595-Q100	NEXPERIA	获取价格	8-bit serial-in/serial-out or parallel-out shift register with output latches
74VHC595SJ	FAIRCHILD	获取价格	8-Bit Shift Register with Output Latches
74VHC595SJ	ROCHESTER	获取价格	AHC/VHC SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16, 5.
74VHC595SJX	FAIRCHILD	获取价格	8-Bit Shift Register with Output Latches
74VHC595SJX	ROCHESTER	获取价格	AHC/VHC SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16, 5.
74VHC74	MOTOROLA	获取价格	Dual D-Type Flip-Flop with Set and Reset
74VHC74	STMICROELECTRONICS	获取价格	DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
74VHC74	FAIRCHILD	获取价格	Dual D-Type Flip-Flop with Preset and Clear
74VHC74_04	STMICROELECTRONICS	获取价格	DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
74VHC74_08	FAIRCHILD	获取价格	Dual D-Type Flip-Flop with Preset and Clear

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