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74VHC74MTCX PDF预览

74VHC74MTCX

更新时间: 2024-11-18 12:23:31
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器锁存器逻辑集成电路光电二极管PC
页数 文件大小 规格书
10页 304K
描述
Dual D-Type Flip-Flop with Preset and Clear

74VHC74MTCX 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Transferred零件包装代码:TSSOP
包装说明:TSSOP, TSSOP14,.25针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:2.75
Samacsys Confidence:3Samacsys Status:Released
Samacsys PartID:166742Samacsys Pin Count:14
Samacsys Part Category:Integrated CircuitSamacsys Package Category:Small Outline Packages
Samacsys Footprint Name:MO-153 (TSSOP)Samacsys Released Date:2015-04-13 16:42:28
Is Samacsys:N系列:AHC/VHC/H/U/V
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:D FLIP-FLOP最大频率@ Nom-Sup:75000000 Hz
最大I(ol):0.008 A湿度敏感等级:1
位数:1功能数量:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/5.5 V
Prop。Delay @ Nom-Sup:10.5 ns传播延迟(tpd):17.5 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:4.4 mm
最小 fmax:110 MHzBase Number Matches:1

74VHC74MTCX 数据手册

 浏览型号74VHC74MTCX的Datasheet PDF文件第2页浏览型号74VHC74MTCX的Datasheet PDF文件第3页浏览型号74VHC74MTCX的Datasheet PDF文件第4页浏览型号74VHC74MTCX的Datasheet PDF文件第5页浏览型号74VHC74MTCX的Datasheet PDF文件第6页浏览型号74VHC74MTCX的Datasheet PDF文件第7页 
February 2008  
74VHC74  
Dual D-Type Flip-Flop with Preset and Clear  
Features  
General Description  
High Speed: f  
= 170MHz (typ.) at T = 25°C  
The VHC74 is an advanced high speed CMOS Dual  
D-Type Flip-Flop fabricated with silicon gate CMOS  
technology. It achieves the high speed operation similar  
to equivalent Bipolar Schottky TTL while maintaining the  
CMOS low power dissipation. The signal level applied to  
the D input is transferred to the Q output during the posi-  
tive going transition of the CK pulse. CLR and PR are  
independent of the CK and are accomplished by setting  
the appropriate input LOW.  
MAX  
A
High noise immunity: V  
= V  
= 28% V (min.)  
NIH  
NIL CC  
Power down protection is provided on all inputs  
Low power dissipation: I = 2µA (max.) at T = 25°C  
CC  
A
Pin and function compatible with 74HC74  
An input protection circuit ensures that 0V to 7V can be  
applied to the input pins without regard to the supply  
voltage. This device can be used to interface 5V to 3V  
systems and two supply systems such as battery  
backup. This circuit prevents device destruction due to  
mismatched supply and input voltages.  
Ordering Information  
Package  
Order Number  
Number  
Package Description  
74VHC74M  
M14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"  
Narrow  
74VHC74SJ  
M14D  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74VHC74MTC  
MTC14  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,  
4.4mm Wide  
74VHC74N  
N14A  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.  
All packages are lead free per JEDEC: J-STD-020B standard.  
©1992 Fairchild Semiconductor Corporation  
74VHC74 Rev. 1.3.0  
www.fairchildsemi.com  

74VHC74MTCX 替代型号

型号 品牌 替代类型 描述 数据表
74VHC74MTC FAIRCHILD

完全替代

Dual D-Type Flip-Flop with Preset and Clear
74VHC74MTC ONSEMI

类似代替

双 D 型触发器,带预置和清除
74VHC74MTCX ONSEMI

类似代替

双 D 型触发器,带预置和清除

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74VHC74MX_NL FAIRCHILD

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74VHC74N ROCHESTER

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74VHC74N FAIRCHILD

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74VHC74N_08 FAIRCHILD

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Dual D-Type Flip-Flop with Preset and Clear