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74VHC74MX

更新时间： 2024-11-21 19:31:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电二极管
页数 文件大小 规格书
6页 79K
描述
D Flip-Flop, AHC/VHC/H/U/V Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, PDSO14, 0.150 INCH, LEAD FREE, MS-012AB, SOIC-14

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中文翻译

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74VHC74MX 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Transferred零件包装代码：SOIC
包装说明：SOP, SOP14,.25针数：14
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.14
系列：AHC/VHC/H/U/VJESD-30 代码：R-PDSO-G14
JESD-609代码：e3长度：8.625 mm
负载电容（CL）：50 pF逻辑集成电路类型：D FLIP-FLOP
最大频率@ Nom-Sup：75000000 Hz最大I（ol）：0.008 A
湿度敏感等级：1位数：1
功能数量：2端子数量：14
最高工作温度：85 °C最低工作温度：-40 °C
输出极性：COMPLEMENTARY封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP14,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TR峰值回流温度（摄氏度）：NOT SPECIFIED
电源：2/5.5 VProp。Delay @ Nom-Sup：10.5 ns
传播延迟（tpd）：17.5 ns认证状态：Not Qualified
座面最大高度：1.75 mm子类别：FF/Latches
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：2 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED触发器类型：POSITIVE EDGE
宽度：3.9 mm最小 fmax：110 MHz
Base Number Matches：1

74VHC74MX 数据手册

 浏览型号74VHC74MX的Datasheet PDF文件第2页浏览型号74VHC74MX的Datasheet PDF文件第3页浏览型号74VHC74MX的Datasheet PDF文件第4页浏览型号74VHC74MX的Datasheet PDF文件第5页浏览型号74VHC74MX的Datasheet PDF文件第6页 
October 1992  
Revised March 1999  
74VHC74  
Dual D-Type Flip-Flop with Preset and Clear  
age. This device can be used to interface 5V to 3V systems  
and two supply systems such as battery backup. This cir-  
cuit prevents device destruction due to mismatched supply  
and input voltages.  
General Description  
The VHC74 is an advanced high speed CMOS Dual D-  
Type Flip-Flop fabricated with silicon gate CMOS technol-  
ogy. It achieves the high speed operation similar to equiva-  
lent Bipolar Schottky TTL while maintaining the CMOS low  
power dissipation. The signal level applied to the D input is  
transferred to the Q output during the positive going transi-  
tion of the CK pulse. CLR and PR are independent of the  
CK and are accomplished by setting the appropriate input  
LOW.  
Features  
■ High Speed: fMAX = 170 MHz (typ) at TA = 25°C  
■ High noise immunity: VNIH = VNIL = 28% VCC (min)  
■ Power down protection is provided on all inputs  
■ Low power dissipation: ICC = 2 µA (max) at TA = 25°C  
An input protection circuit ensures that 0V to 7V can be  
applied to the input pins without regard to the supply volt-  
■ Pin and function compatible with 74HC74  
Ordering Code:  
Order Number Package Number  
Package Description  
74VHC74M  
74VHC74SJ  
74VHC74MTC  
74VHC74N  
M14A  
M14D  
MTC14  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Truth Table  
Pin Descriptions  
Inputs  
CLR PR  
Outputs  
Pin Names  
D1, D2  
Description  
Data Inputs  
Function  
D
CK  
X
Q
L
Q
H
L
L
H
L
H
L
X
X
X
L
Clear  
CK1, CK2  
Clock Pulse Inputs  
Direct Clear Inputs  
Direct Preset Inputs  
Output  
X
H
Preset  
CLR1, CLR2  
PR1, PR2  
L
X
H (Note 1) H (Note 1)  
H
H
H
H
H
H
L
H
H
L
Q1, Q1, Q2, Q2  
H
X
Qn  
Qn  
No Change  
Note 1: This configuration is nonstable; that is, it will not persist when pre-  
set and clear inputs return to their inactive (HIGH) state.  
© 1999 Fairchild Semiconductor Corporation  
DS011505.prf  
www.fairchildsemi.com  
123456

中文翻译

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74VHC74MX 替代型号

型号 品牌 替代类型 描述 数据表
74VHC74MX ONSEMI

类似代替

 双 D 型触发器，带预置和清除
74VHC74M FAIRCHILD

类似代替

 Dual D-Type Flip-Flop with Preset and Clear
SN74AHC74DR TI

功能相似

 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

与74VHC74MX相关器件

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74VHC74MX_NL FAIRCHILD

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 		Dual D-Type Flip-Flop with Preset and Clear
74VHC74N ONSEMI

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 		Dual D-Type Flip-Flop with Preset and Clear, MDIP 14L, 2500-RAIL
74VHC74N ROCHESTER

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 		AHC/VHC/H/U/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP
74VHC74N FAIRCHILD

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 		Dual D-Type Flip-Flop with Preset and Clear
74VHC74N_08 FAIRCHILD

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 		Dual D-Type Flip-Flop with Preset and Clear
74VHC74SJ FAIRCHILD

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 		Dual D-Type Flip-Flop with Preset and Clear
74VHC74SJ ROCHESTER

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 		AHC/VHC/H/U/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO
74VHC74SJ_08 FAIRCHILD

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 		Dual D-Type Flip-Flop with Preset and Clear
74VHC74SJX ROCHESTER

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 		AHC/VHC/H/U/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO
74VHC74T STMICROELECTRONICS

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 		DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR

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