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74LVT162245BDGG PDF预览

74LVT162245BDGG

更新时间: 2024-09-16 11:15:11
品牌 Logo 应用领域
安世 - NEXPERIA 信息通信管理光电二极管逻辑集成电路
页数 文件大小 规格书
11页 218K
描述
3.3 V 16-bit transceiver with 30 Ω termination resistors; 3-stateProduction

74LVT162245BDGG 技术参数

是否Rohs认证:符合生命周期:Active
包装说明:TSSOP2-48Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.03Is Samacsys:N
其他特性:WITH DIRECTION CONTROL系列:LVT
JESD-30 代码:R-PDSO-G48JESD-609代码:e4
长度:12.65 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS TRANSCEIVER湿度敏感等级:1
位数:8功能数量:2
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE WITH SERIES RESISTOR输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSOP2
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
峰值回流温度(摄氏度):260最大电源电流(ICC):6 mA
传播延迟(tpd):3.9 ns认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:BICMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:6.25 mmBase Number Matches:1

74LVT162245BDGG 数据手册

 浏览型号74LVT162245BDGG的Datasheet PDF文件第2页浏览型号74LVT162245BDGG的Datasheet PDF文件第3页浏览型号74LVT162245BDGG的Datasheet PDF文件第4页浏览型号74LVT162245BDGG的Datasheet PDF文件第5页浏览型号74LVT162245BDGG的Datasheet PDF文件第6页浏览型号74LVT162245BDGG的Datasheet PDF文件第7页 
74LVT162245B  
3.3 V 16-bit transceiver with 30 Ω termination resistors;  
3-state  
Rev. 4 — 6 August 2021  
Product data sheet  
1. General description  
The 74LVT162245B is a 16-bit transceiver with 30 Ω termination resistors and 3-state outputs. The  
device can be used as two 8-bit transceivers or one 16-bit transceiver. The device features two  
output enables (1OE and 2OE) each controlling eight outputs, and two send/receive (1DIR and  
2DIR) inputs for direction control. A HIGH on nOE causes the outputs to assume a high-impedance  
OFF-state. Bus hold data inputs eliminate the need for external pull-up resistors to define unused  
inputs  
2. Features and benefits  
16-bit bidirectional bus interface  
3-state buffers  
Output capability: +12 mA/–12 mA  
Wide supply voltage range from 2.7 to 3.6 V  
BiCMOS high speed and output drive  
Direct interface with TTL levels  
Overvoltage tolerant inputs to 5.5 V  
Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs  
Live insertion/extraction permitted  
Outputs include series resistance of 30 Ω making external termination resistors unnecessary  
Power-up 3-state  
No bus current loading when output is tied to 5 V bus  
IOFF circuitry provides partial Power-down mode operation  
Latch-up performance exceeds 500 mA per JESD 78 Class II Level B  
Complies with JEDEC standards JESD8C (2.7 V to 3.6 V)  
ESD protection:  
HBM: JESD22-A114F exceeds 2000 V  
MM: JESD22-A115-A exceeds 200 V  
Specified from -40 °C to 85 °C  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74LVT162245BDGG -40 °C to +85 °C  
TSSOP48  
plastic thin shrink small outline package; 48 leads; SOT362-1  
body width 6.1 mm  
 
 
 

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