Datasheet > 逻辑 > 总线驱动器/收发器> 74LVT162245G

74LVT162245G

更新时间： 2024-11-29 21:54:31

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		总线驱动器总线收发器电阻器逻辑集成电路信息通信管理
页数	文件大小	规格书
9页	99K
描述
Low Voltage 16-Bit Transceiver with 3-STATE Outputs and 25? Series Resistors in A Port Outputs

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74LVT162245G 技术参数

生命周期：	Obsolete	零件包装代码：	BGA
包装说明：	LFBGA, BGA54,6X9,32	针数：	54
Reach Compliance Code：	unknown	风险等级：	5.39
Is Samacsys：	N	控制类型：	COMMON CONTROL
计数方向：	BIDIRECTIONAL	系列：	LVT
JESD-30 代码：	R-PBGA-B54	长度：	8 mm
逻辑集成电路类型：	BUS TRANSCEIVER	最大I（ol）：	0.064 A
位数：	8	功能数量：	2
端口数量：	2	端子数量：	54
最高工作温度：	85 °C	最低工作温度：	-40 °C
输出特性：	3-STATE WITH SERIES RESISTOR	输出极性：	TRUE
封装主体材料：	PLASTIC/EPOXY	封装代码：	LFBGA
封装等效代码：	BGA54,6X9,32	封装形状：	RECTANGULAR
封装形式：	GRID ARRAY, LOW PROFILE, FINE PITCH	电源：	3.3 V
Prop。Delay @ Nom-Sup：	4 ns	传播延迟（tpd）：	4.6 ns
认证状态：	Not Qualified	座面最大高度：	1.4 mm
子类别：	Bus Driver/Transceivers	最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	2.7 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	技术：	BICMOS
温度等级：	INDUSTRIAL	端子形式：	BALL
端子节距：	0.8 mm	端子位置：	BOTTOM
翻译：	N/A	宽度：	5.5 mm
Base Number Matches：	1

74LVT162245G 数据手册

January 1999

Revised June 2005

74LVT162245 • 74LVTH162245

Low Voltage 16-Bit Transceiver with 3-STATE Outputs

and 25: Series Resistors in A Port Outputs

General Description

Features

■ Input and output interface capability to systems at

The LVT162245 and LVTH162245 contains sixteen non-

inverting bidirectional buffers with 3-STATE outputs and is

intended for bus oriented applications. The device is byte

controlled. Each byte has separate control inputs which

can be shorted together for full 16-bit operation. The T/R

inputs determine the direction of data flow through the

device. The OE inputs disable both the A and B ports by

placing them in a high impedance state.

5V V_CC

■ Bushold data inputs eliminate the need for external pull-

up resistors to hold unused inputs (74LVTH162245),

also available without bushold feature (74LVT162245).

■ Live insertion/extraction permitted

■ Power Up/Down high impedance provides glitch-free

bus loading

The LVT162245 and LVTH162245 are designed with

equivalent 25 series resistance in both the HIGH and

LOW states on the A Port outputs. This design reduces line

noise in applications such as memory address drivers,

clock drivers, and bus transceivers/transmitters.

■ A Port outputs include equivalent series resistance of

25 making external termination resistors unnecessary

and reducing overshoot and undershoot

■ A Port outputs source/sink 12 mA.

B Port outputs source/sink 32 mA/ 64 mA

The LVTH162245 data inputs include bushold, eliminating

the need for external pull-up resistors to hold unused

inputs.

■ Functionally compatible with the 74 series 162245

■ Latch-up performance exceeds 500 mA

■ ESD performance:

These non-inverting transceivers are designed for low volt-

age (3.3V) V_CCapplications, but with the capability to pro-

Human-body model 2000V

vide a TTL interface to a 5V environment. The LVT162245

and LVTH162245 are fabricated with an advanced

BiCMOS technology to achieve high speed operation simi-

lar to 5V ABT while maintaining a low power dissipation.

Machine model 200V

Charged-device model 1000V

■ Also packaged in plastic Fine Pitch Ball Grid Array

(FBGA)

Ordering Code:

Order Number

Package Number

Package Description

74LVT162245G

(Note 1)(Note 2)

BGA54A

(Preliminary)

54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

74LVT162245MEA

(Note 2)

MS48A

MTD48

BGA54A

MS48A

MTD48

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

74LVT162245MTD

(Note 2)

74LVTH162245G

(Note 1)(Note 2)

74LVTH162245MEA

74LVTH162245MEX

74LVTH162245MTD

74LVTH162245MTX

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

[TUBE]

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

[TAPE and REEL]

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

[TUBE]

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

[TAPE and REEL]

Note 1: Ordering code “G” indicates Trays.

Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

DS012446

www.fairchildsemi.com

12 3 4 5 6 7...9

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与74LVT162245G相关器件

型号	品牌	获取价格	描述	数据表
74LVT162245GX	FAIRCHILD	获取价格	Bus Transceiver, LVT Series, 2-Func, 8-Bit, True Output, BICMOS, PBGA54, 5.50 MM, PLASTIC,
74LVT162245MEA	FAIRCHILD	获取价格	Low Voltage 16-Bit Transceiver with 3-STATE Outputs and 25? Series Resistors in A Port Out
74LVT162245MEA	ROCHESTER	获取价格	LVT SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48, 0.300 INCH, MO-118, SSOP-48
74LVT162245MEAX	ROCHESTER	获取价格	LVT SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48, 0.300 INCH, MO-118, SSOP-48
74LVT162245MTD	FAIRCHILD	获取价格	Low Voltage 16-Bit Transceiver with 3-STATE Outputs and 25? Series Resistors in A Port Out
74LVT162245MTD	ROCHESTER	获取价格	LVT SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48, 6.10 MM, MO-153, TSSOP-48
74LVT162245MTD	ONSEMI	获取价格	带 3 态输出和 A 端口输出具有 25 Ω 串联电阻的低电压 16 位收发器
74LVT162245MTDX	FAIRCHILD	获取价格	Bus Transceiver, LVT Series, 2-Func, 8-Bit, True Output, BICMOS, PDSO48, 6.10 MM, MO-153,
74LVT162245MTDX	ROCHESTER	获取价格	LVT SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48, 6.10 MM, MO-153, TSSOP-48
74LVT162245MTDX	ONSEMI	获取价格	带 3 态输出和 A 端口输出具有 25 Ω 串联电阻的低电压 16 位收发器

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