Datasheet > 74LVT125BQ,699

74LVT125BQ,699

更新时间： 2024-11-06 21:00:07

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
16页	85K
描述
74LVT(H)125 - 3.3 V quad buffer; 3-state QFN 14-Pin

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技术参数
数据手册

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74LVT125BQ,699 技术参数

生命周期：	Active	零件包装代码：	QFN
包装说明：	2.50 X 3 MM, 0.850 MM HEIGHT, PLASTIC, MO-241, SOT762-1, DHVQFN-14	针数：	14
Reach Compliance Code：	unknown	风险等级：	5.73
Base Number Matches：	1

74LVT125BQ,699 数据手册

74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

Rev. 06 — 6 March 2006

Product data sheet

1. General description

The 74LVT125; 74LVTH125 is a high-performance BiCMOS product designed for V_CC

operation at 3.3 V.

This device combines low static and dynamic power dissipation with high speed and high

output drive. The 74LVT125; 74LVTH125 device is a quad buffer that is ideal for driving

bus lines. The device features four output enable inputs (1OE, 2OE, 3OE and 4OE), each

controlling one of the 3-state outputs.

2. Features

I Quad bus interface

I 3-state buffers

I Output capability: +64 mA and −32 mA

I TTL input and output switching levels

I Input and output interface capability to systems at 5 V supply

I Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs

I Live insertion and extraction permitted

I No bus current loading when output is tied to 5 V bus

I Power-up 3-state

I Latch-up protection:

N JESD78: exceeds 500 mA

I ESD protection:

N MIL STD 883 method 3015: exceeds 2000 V

N Machine model: exceeds 200 V

3. Quick reference data

Table 1.

Quick reference data

GND = 0 V; T_amb= 25 °C.

Symbol Parameter

Conditions

Min

Typ

Max Unit

t_PLH

LOW-to-HIGH propagation C_L= 50 pF; V_CC= 3.3 V

delay nA to nY

2.7

t_PHL

HIGH-to-LOW propagation C_L= 50 pF; V_CC= 3.3 V

delay nA to nY

2.9

12 3 4 5 6 7...16

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