5秒后页面跳转
74LVT125DB PDF预览

74LVT125DB

更新时间: 2024-09-15 22:34:27
品牌 Logo 应用领域
恩智浦 - NXP 总线驱动器总线收发器逻辑集成电路光电二极管信息通信管理
页数 文件大小 规格书
15页 92K
描述
3.3 V quad buffer; 3-state

74LVT125DB 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:SSOP
包装说明:SSOP, SSOP14,.3针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.04控制类型:ENABLE LOW
系列:LVTJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:6.2 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.064 A湿度敏感等级:1
位数:1功能数量:4
端口数量:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP14,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3.3 V最大电源电流(ICC):7 mA
Prop。Delay @ Nom-Sup:4 ns传播延迟(tpd):4.9 ns
认证状态:Not Qualified座面最大高度:2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:BICMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:5.3 mmBase Number Matches:1

74LVT125DB 数据手册

 浏览型号74LVT125DB的Datasheet PDF文件第2页浏览型号74LVT125DB的Datasheet PDF文件第3页浏览型号74LVT125DB的Datasheet PDF文件第4页浏览型号74LVT125DB的Datasheet PDF文件第5页浏览型号74LVT125DB的Datasheet PDF文件第6页浏览型号74LVT125DB的Datasheet PDF文件第7页 
74LVT125  
3.3 V quad buffer; 3-state  
Rev. 05 — 10 February 2005  
Product data sheet  
1. General description  
The LVT125 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.  
This device combines low static and dynamic power dissipation with high speed and high  
output drive. The 74LVT125 device is a quad buffer that is ideal for driving bus lines. The  
device features four output enable inputs (1OE, 2OE, 3OE and 4OE), each controlling one  
of the 3-state outputs.  
2. Features  
Quad bus interface  
3-state buffers  
Output capability: +64 mA and 32 mA  
TTL input and output switching levels  
Input and output interface capability to systems at 5 V supply  
Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused  
inputs  
Live insertion and extraction permitted  
No bus current loading when output is tied to 5 V bus  
Power-up 3-state  
Latch-up protection:  
JESD78: exceeds 500 mA  
ESD protection:  
MIL STD 883 method 3015: exceeds 2000 V  
Machine model: exceeds 200 V  
3. Quick reference data  
Table 1:  
Quick reference data  
GND = 0 V; Tamb = 25 °C.  
Symbol Parameter  
Conditions  
Min  
Typ  
2.7  
2.9  
4
Max Unit  
tPLH  
tPHL  
CI  
propagation delay nA to nY CL = 50 pF; VCC = 3.3 V  
propagation delay nA to nY CL = 50 pF; VCC = 3.3 V  
-
-
-
-
-
-
-
-
ns  
ns  
pF  
pF  
input capacitance  
output capacitance  
VI = 0 V or 3.0 V  
CO  
outputs disabled;  
VO = 0 V or 3.0 V  
8
ICC  
quiescent supply current  
outputs disabled;  
-
0.13  
-
mA  
VCC = 3.6 V  

与74LVT125DB相关器件

型号 品牌 获取价格 描述 数据表
74LVT125DB,112 NXP

获取价格

74LVT(H)125 - 3.3 V quad buffer; 3-state SSOP1 14-Pin
74LVT125DB,118 NXP

获取价格

74LVT(H)125 - 3.3 V quad buffer; 3-state SSOP1 14-Pin
74LVT125DB-T ETC

获取价格

4-Bit Buffer/Driver
74LVT125D-T NXP

获取价格

3.3 V quad buffer 3-state
74LVT125M TI

获取价格

LVT SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14, 0.150 INCH, PLASTIC, SOIC-14
74LVT125M FAIRCHILD

获取价格

Bus Driver, 1-Func, 4-Bit, True Output, BICMOS, PDSO14,
74LVT125MTC TI

获取价格

LVT SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14, 4.40 MM, PLASTIC, TSSOP-14
74LVT125MTC FAIRCHILD

获取价格

Bus Driver, 1-Func, 4-Bit, True Output, BICMOS, PDSO14,
74LVT125MTCX FAIRCHILD

获取价格

Bus Driver/Transceiver,
74LVT125MTCX TI

获取价格

暂无描述