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74LVQ174MTR PDF预览

74LVQ174MTR

更新时间: 2024-11-17 04:47:51
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 触发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
13页 302K
描述
HEX D-TYPE FLIP FLOP WITH CLEAR

74LVQ174MTR 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP-16
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.27
Is Samacsys:N系列:LVQ
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:9.9 mm负载电容(CL):50 pF
逻辑集成电路类型:D FLIP-FLOP最大频率@ Nom-Sup:70000000 Hz
最大I(ol):0.024 A湿度敏感等级:1
位数:6功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:11 ns传播延迟(tpd):14.5 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:FF/Latches最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.7 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:3.9 mm
最小 fmax:70 MHzBase Number Matches:1

74LVQ174MTR 数据手册

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74LVQ174  
HEX D-TYPE FLIP FLOP WITH CLEAR  
HIGH SPEED:  
= 150 MHz (TYP.) at V = 3.3 V  
f
MAX  
CC  
COMPATIBLE WITH TTL OUTPUTS  
LOW POWER DISSIPATION:  
I
= 4 µA (MAX.) at T =25°C  
CC  
A
LOW NOISE:  
= 0.3V (TYP.) at V = 3.3V  
75TRANSMISSION LINE DRIVING  
CAPABILITY  
SYMMETRICAL OUTPUT IMPEDANCE:  
SOP  
TSSOP  
V
OLP  
CC  
Table 1: Order Codes  
PACKAGE  
|I | = I = 12mA (MIN) at V = 3.0 V  
T & R  
OH  
OL  
CC  
PCI BUS LEVELS GUARANTEED AT 24 mA  
BALANCED PROPAGATION DELAYS:  
SOP  
74LVQ174MTR  
74LVQ174TTR  
TSSOP  
t
t
PHL  
PLH  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 3.6V (1.2V Data Retention)  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 174  
technology. It is ideal for low power and low noise  
3.3V applications.  
Information signals applied to D inputs are  
transferred to the Q outputs on the positive going  
edge of the CLK pulse.  
V
CC  
IMPROVED LATCH-UP IMMUNITY  
When the CLR input is held low, the Q outputs are  
held low independently of the other inputs.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
DESCRIPTION  
The 74LVQ174 is a low voltage CMOS HEX  
D-TYPE FLIP FLOP WITH CLEAR NON  
INVERTING fabricated with sub-micron silicon  
2
gate and double-layer metal wiring C MOS  
Figure 1: Pin Connection And IEC Logic Symbols  
Rev. 5  
1/13  
July 2004  

74LVQ174MTR 替代型号

型号 品牌 替代类型 描述 数据表
74LVQ174TTR STMICROELECTRONICS

完全替代

HEX D-TYPE FLIP FLOP WITH CLEAR
74LVQ174SCX FAIRCHILD

功能相似

D Flip-Flop, LVQ Series, 1-Func, Positive Edge Triggered, 6-Bit, True Output, CMOS, PDSO16

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HEX D-TYPE FLIP FLOP WITH CLEAR