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74LVQ174 PDF预览

74LVQ174

更新时间: 2024-11-19 22:53:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
6页 85K
描述
Low Voltage Hex D-Type Flip-Flop with Master Reset

74LVQ174 数据手册

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May 1998  
74LVQ174  
Low Voltage Hex D-Type Flip-Flop with Master Reset  
General Description  
Features  
n Ideal for low power/low noise 3.3V applications  
The LVQ174 is a high-speed hex D-type flip-flop. The device  
is used primarily as a 6-bit edge-triggered storage register.  
The information on the D inputs is transferred to storage dur-  
ing the LOW-to-HIGH clock transition. The device has a  
Master Reset to simultaneously clear all flip-flops.  
n Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
n Guaranteed pin-to-pin skew AC performance  
n Guaranteed incident wave switching into 75  
Ordering Code:  
Order Number  
74LVQ174SC  
74LVQ174SJ  
Package Number  
M16A  
Package Description  
16-Lead (0.150" Wide) Small Outline Integrated Circuit, SOIC JEDEC  
16-Lead Molded Small Outline Package, SOIC EIAJ  
M16D  
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
Pin Assignment for  
SOIC JEDEC and EIAJ  
DS011353-1  
IEEE/IEC  
DS011353-3  
Pin Descriptions  
Pin Names  
Description  
D0–D5  
CP  
Data Inputs  
Clock Pulse Input  
Master Reset Input  
Outputs  
MR  
Q0–Q5  
DS011353-2  
© 1998 Fairchild Semiconductor Corporation  
DS011353  
www.fairchildsemi.com  

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