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74LVQ174 PDF预览

74LVQ174

更新时间: 2024-11-19 22:53:19
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 触发器
页数 文件大小 规格书
10页 73K
描述
HEX D-TYPE FLIP FLOP WITH CLEAR

74LVQ174 数据手册

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74LVQ174  
HEX D-TYPE FLIP FLOP WITH CLEAR  
HIGH SPEED:  
fMAX =150MHz(TYP.) at VCC =3.3V  
COMPATIBLEWITH TTL OUTPUTS  
LOW POWER DISSIPATION:  
I
CC =4 µA (MAX.) at TA =25 oC  
M
T
LOWNOISE:  
(Micro Package)  
(TSSOPPackage)  
VOLP =0.3 V (TYP.)at VCC = 3.3V  
75TRANSMISSIONLINEDRIVING  
CAPABILITY  
SYMMETRICAL OUTPUT IMPEDANCE:  
|IOH| = IOL = 12 mA (MIN)  
ORDER CODES :  
74LVQ174M  
74LVQ174T  
3.3V applications.  
PCI BUSLEVELSGUARANTEED AT 24mA  
BALANCEDPROPAGATIONDELAYS:  
tPLH tPHL  
Information signals applied to D inputs are  
transfered to the Q outputs on the positive going  
edge of the clock pulse.  
When the CLEAR input is held low, the Q outputs  
are held low independentelyof the other inputs .  
It has better speed performance at 3.3V than 5V  
LS-TTL family combined with the true CMOS low  
power consumption.  
OPERATING VOLTAGERANGE:  
VCC (OPR)= 2V to 3.6V(1.2VDataRetention)  
PIN AND FUNCTION COMPATIBLEWITH  
74 SERIES174  
IMPROVED LATCH-UP IMMUNITY  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
DESCRIPTION  
The LVQ174 is a low voltage CMOS HEX  
D-TYPE FLIP FLOP WITH CLEAR NON  
INVERTING fabricated with sub-micron silicon  
gate and double-layer metal wiring C2MOS  
technology.It is ideal for low power and low noise  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
1/10  
February 1999  

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