74LVC1G157GW

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74LVC1G157GW 数据手册

74LVC1G157

Single 2-input multiplexer

Rev. 03 — 12 July 2007

Product data sheet

1. General description

The 74LVC1G157 is a single 2-input multiplexer which select data from two data inputs (I0

and I1) under control of a common data select input (S). The state of the common data

select input determines the particular register from which the data comes. The output (Y)

presents the selected data in the true (non-inverted) form.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these

devices as translators in mixed 3.3 V and 5 V applications.

This device is fully speciﬁed for partial power-down applications using I_OFF

The I_OFFcircuitry disables the output, preventing the damaging backﬂow current through

the device when it is powered down.

Schmitt-trigger action at all inputs makes the circuit highly tolerant to slower input rise and

fall times.

2. Features

■ Wide supply voltage range from 1.65 V to 5.5 V

■ High noise immunity

■ Complies with JEDEC standard:

◆ JESD8-7 (1.65 V to 1.95 V)

◆ JESD8-5 (2.3 V to 2.7 V)

◆ JESD8B/JESD36 (2.7 V to 3.6 V)

■ ±24 mA output drive (V_CC= 3.0 V)

■ CMOS low power consumption

■ Latch-up performance exceeds 250 mA

■ Direct interface with TTL levels

■ Inputs accept voltages up to 5 V

■ ESD protection:

◆ HBM JESD22-A114E exceeds 2000 V

◆ MM JESD22-A115-A exceeds 200 V

■ Multiple package options

■ Speciﬁed from −40 °C to +85 °C and −40 °C to +125 °C

12 3 4 5 6 7...15

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型号	品牌	替代类型	描述	数据表
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型号	品牌	获取价格	描述	数据表
74LVC1G157GW-G	NXP	获取价格	Single 2-input multiplexer
74LVC1G157GW-Q100	NEXPERIA	获取价格	Single 2-input multiplexer
74LVC1G157-Q100	NEXPERIA	获取价格	Single 2-input multiplexer
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74LVC1G16GF	NEXPERIA	获取价格	Single buffer
74LVC1G16GM	NEXPERIA	获取价格	Single buffer
74LVC1G16GW	NEXPERIA	获取价格	Single buffer
74LVC1G16GW-Q100	NEXPERIA	获取价格	Single bufferProduction
74LVC1G17	DIODES	获取价格	SINGLE SCHMITT-TRIGGER BUFFER
74LVC1G17	NXP	获取价格	Single Schmitt-trigger buffer